AT49LH004-33TC Atmel, AT49LH004-33TC Datasheet - Page 4

• Manufacturer Part Number: AT49LH004-33TC
• Description: IC FLASH 4MBIT 33MHZ 40TSOP
• Manufacturer: Atmel

Specifications of AT49LH004-33TC

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 33MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 40-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5. Pin Description
Table 5-1
both the FWH/LPC interface as well as the A/A Mux interface.
Table 5-1.
4
Symbol
IC
CLK
FWH4/
LFRAME
FWH/
LAD[3:0]
RST
INIT
TBL
AT49LH004
provides a description of each of the device pins. Most of the pins have dual functionality in that they are used for
Name and Function
INTERFACE COMMUNICATION: The IC pin determines which interface is
operational. If the IC pin is held high, then the A/A Mux interface is enabled, and if
the IC pin is held low, then the FWH/LPC interface is enabled. The IC pin must be
set at power-up or before returning from a reset condition and cannot be changed
during device operation.
The IC pin is internally pulled-down with a resistor valued between 20 kΩ and
100 kΩ, so connection of this pin is not necessary if the FWH/LPC interface will
always be used in the system. If the IC pin is driven high to enable the A/A Mux
interface, then the pin will exhibit some leakage current.
FWH/LPC CLOCK: This pin is used to provide a clock to the device. This pin is
usually connected to the 33 MHz PCI clock and adheres to the PCI specification.
This pin is used as the R/C pin in the A/A Mux interface.
FWH INPUT/LPC FRAME: This pin is used to indicate the start of a FWH or LPC
data transfer operation. The pin is also used to abort a FWH or LPC cycle in
progress.
This pin is used as the WE pin in the A/A Mux interface.
FWH/LPC ADDRESS AND DATA: These pins are used for FWH/LPC bus
information such as addresses, data, and command inputs/outputs.
These pins are used as the I/O[3:0] pins in the A/A Mux interface.
INTERFACE RESET: The RST pin is used for both FWH/LPC and A/A Mux
interfaces. When the RST pin is driven low, write operations are inhibited, internal
automation is reset, and the FWH/LAD[3:0] pins (when using the FWH/LPC
interface) are put into a high-impedance state. When the device exits the reset
state, it will default to the read array mode.
PROCESSOR RESET/INITIALIZE: The INIT pin is used as a second reset pin for
In-System operation and functions identically to the RST pin. The INIT pin is
designed to be connected to the chipset’s INIT signal.
The maximum voltage to be applied to the INIT pin depends on the processor’s or
chipset’s specifications. Systems must take care to not violate processor or chipset
specifications regarding the INIT pin voltage.
This pin is used as the OE pin in the A/A Mux interface.
TOP BOOT SECTOR LOCK: When the TBL pin is held low, program and erase
operations cannot be performed to the top 64-Kbyte region (in FWH mode) or the
top 32-Kbyte boot sector (in LPC mode) regardless of the state of the Sector
Locking Registers. In addition, the TBL pin will protect the uppermost 64-Kbyte
region against erasures when using the LPC mode and the Uniform Sector Erase
command. Please refer to the Sector Protection section for more details.
If the TBL pin is held high, then hardware write protection for the top boot sector will
be disabled. However, register-based sector protection will still apply. The state of
the TBL pin does not affect the state of the Sector Locking Registers.
This pin is used as the A4 pin in the A/A Mux interface.
Signal Descriptions
FWH/LPC
X
X
X
X
X
X
X
Interface
A/A Mux
X
X
3383D–FLASH–6/05
Output
Input/
Type
Input
Input
Input
Input
Input
Input