AT26DF081A-SSU Atmel, AT26DF081A-SSU Datasheet - Page 18

• Manufacturer Part Number: AT26DF081A-SSU
• Description: IC FLASH 8MBIT 70MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT26DF081A-SSU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 256 bytes)
• Speed: 70MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.5
18
Global Protect/Unprotect
AT26DF081A
Unprotect Sector command will be ignored, and the device will reset the WEL bit in the Status
Register back to a logical “0” and return to the idle state once the CS pin has been deasserted.
Figure 9-4.
The Global Protect and Global Unprotect features can work in conjunction with the Protect Sec-
tor and Unprotect Sector functions. For example, a system can globally protect the entire
memory array and then use the Unprotect Sector command to individually unprotect certain sec-
tors and individually reprotect them later by using the Protect Sector command. Likewise, a
system can globally unprotect the entire memory array and then individually protect certain sec-
tors as needed.
Performing a Global Protect or Global Unprotect is accomplished by writing a certain combina-
tion of data to the Status Register using the Write Status Register command (see “Write Status
Register” section on
mand is also used to modify the SPRL (Sector Protection Registers Locked) bit to control
hardware and software locking.
To perform a Global Protect, the appropriate WP pin and SPRL conditions must be met, and the
system must write a logical “1” to bits 5, 4, 3, and 2 of the Status Register. Conversely, to per-
form a Global Unprotect, the same WP and SPRL conditions must be met but the system must
write a logical “0” to bits 5, 4, 3, and 2 of the Status Register.
necessary for a Global Protect or Global Unprotect to be performed.
SCK
SO
CS
SI
Unprotect Sector
page 26
MSB
HIGH-IMPEDANCE
0
0
0
1
for command execution details). The Write Status Register com-
1
2
OPCODE
1
3
1
4
0
5
0
6
1
7
MSB
A
8
A
9
A
10 11
A
ADDRESS BITS A23-A0
A
12
A
A
26
Table 9-2
A
27 28
A
A
29 30
A
A
details the conditions
31
3600G–DFLASH–06/09