AT45DB081D-SSU-2.5 Atmel, AT45DB081D-SSU-2.5 Datasheet - Page 9

IC FLASH 8MBIT 50MHZ 8SOIC

AT45DB081D-SSU-2.5

Manufacturer Part Number
AT45DB081D-SSU-2.5
Description
IC FLASH 8MBIT 50MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT45DB081D-SSU-2.5

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
8M (4096 pages x 264 bytes)
Speed
50MHz
Interface
SPI, RapidS
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Architecture
Sectored
Interface Type
SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
64 KB x 16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB081D-SSU-2.5
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7.4
7.5
Table 7-1.
3596M–DFLASH–5/10
PA11/
A19
0
0
0
0
1
1
1
1
Page Erase
Block Erase
PA10/
A18
0
0
0
0
1
1
1
1
Block Erase Addressing
PA9/
A17
0
0
0
0
1
1
1
1
The Page Erase command can be used to individually erase any page in the main memory array
allowing the Buffer to Main Memory Page Program to be utilized at a later time. To perform a
page erase in the Atmel
be loaded into the device, followed by three address bytes comprised of three don’t care bits, 12
page address bits (PA11 - PA0) that specify the page in the main memory to be erased and nine
don’t care bits. To perform a page erase in the binary page size (256-bytes), the opcode 81H
must be loaded into the device, followed by three address bytes consist of four don’t care bits,
12 page address bits (A19 - A8) that specify the page in the main memory to be erased and
eight don’t care bits. When a low-to-high transition occurs on the CS pin, the part will erase the
selected page (the erased state is a logical 1). The erase operation is internally self-timed and
should take place in a maximum time of t
the part is busy.
A block of eight pages can be erased at one time. This command is useful when large amounts
of data has to be written into the device. This will avoid using multiple Page Erase Commands.
To perform a block erase for the DataFlash standard page size (264-bytes), an opcode of 50H
must be loaded into the device, followed by three address bytes comprised of three don’t care
bits, nine page address bits (PA11 -PA3) and 12 don’t care bits. The nine page address bits are
used to specify which block of eight pages is to be erased. To perform a block erase for the
binary page size (256-bytes), the opcode 50H must be loaded into the device, followed by three
address bytes consisting of four don’t care bits, nine page address bits (A19 - A11) and 11 don’t
care bits. The nine page address bits are used to specify which block of eight pages is to be
erased. When a low-to-high transition occurs on the CS pin, the part will erase the selected
block of eight pages. The erase operation is internally self-timed and should take place in a max-
imum time of t
PA8/
A16
0
0
0
0
1
1
1
1
PA7/
A15
0
0
0
0
1
1
1
1
BE
. During this time, the status register will indicate that the part is busy.
PA6/
A14
0
0
0
0
1
1
1
1
®
DataFlash
PA5/
A13
0
0
0
0
1
1
1
1
®
standard page size (264-bytes), an opcode of 81H must
PA4/
A12
0
0
1
1
0
0
1
1
PE
. During this time, the status register will indicate that
PA3/
A11
0
1
0
1
0
1
0
1
PA2/
A10
Atmel AT45DB081D
X
X
X
X
X
X
X
X
PA1/
A9
X
X
X
X
X
X
X
X
PA0/
A8
X
X
X
X
X
X
X
X
Block
508
509
510
511
0
1
2
3
9

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