AT26DF161A-SU Atmel, AT26DF161A-SU Datasheet - Page 10

• Manufacturer Part Number: AT26DF161A-SU
• Description: IC FLASH 16MBIT 70MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT26DF161A-SU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (8192 pages x 256 bytes)
• Speed: 70MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 8-1.
Figure 8-2.
8.2
10
SCK
SO
CS
Sequential Program Mode
SI
AT26DF161A
Byte Program
Page Program
SCK
SO
CS
SI
MSB
HIGH-IMPEDANCE
0
0
0
1
The Byte/Page Program mode is the default programming mode after the device powers-up or
resumes from a device reset.
The Sequential Program Mode improves throughput over the Byte/Page Program command
when the Byte/Page Program command is used to program single bytes only into consecutive
address locations. For example, some systems may be designed to program only a single byte
of information at a time and cannot utilize a buffered Page Program operation due to design
restrictions. In such a case, the system would normally have to perform multiple Byte Program
operations in order to program data into sequential memory locations. This approach can add
considerable system overhead and SPI bus traffic.
The Sequential Programming Mode helps reduce system overhead and bus traffic by incorporat-
ing an internal address counter that keeps track of the byte location to program, thereby
eliminating the need to supply an address sequence to the device for every byte to program.
When using the Sequential Program mode, all address locations to be programmed must be in
the erased state. Before the Sequential Program mode can first be entered, the Write Enable
command must have been previously issued to the device to set the WEL bit of the Status Reg-
ister to a logical “1” state.
To start the Sequential Program Mode, the CS pin must first be asserted, and either an opcode
of ADh or AFh must be clocked into the device. For the first program cycle, three address bytes
must be clocked in after the opcode to designate the first byte location to program. After the
address bytes have been clocked in, the byte of data to be programmed can be sent to the
0
2
OPCODE
0
HIGH-IMPEDANCE
MSB
3
0
0
0
4
0
1
0
5
0
2
OPCODE
1
6
0
3
0
7
0
MSB
4
A
ADDRESS BITS A23-A0
8
0
5
A
9
1
6
A
0
7
MSB
A
8
A
A
29 30
9
ADDRESS BITS A23-A0
A
A
10 11
A
A
31 32
MSB
A
D
12
A
D
33
DATA IN BYTE 1
D
34
D
35
A
29 30
D
36
A
D
37 38
A
31 32
D
MSB
D
D
39
D
33
D
34
DATA IN
D
35
MSB
D
D
36
D
DATA IN BYTE n
D
37 38
D
D
D
D
39
D
D
D
D
3640D–DFLASH–8/09