AT49SV163D-80CU Atmel, AT49SV163D-80CU Datasheet
AT49SV163D-80CU
Specifications of AT49SV163D-80CU
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AT49SV163D-80CU Summary of contents
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... Common Flash Interface (CFI) 1. Description The AT49SV163D( 1.8-volt 16-megabit Flash memory organized as 1,048,576 words of 16 bits each. The memory is divided into 39 sectors for erase operations. The device is offered in a 48-lead TSOP and a 48-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-system programming ...
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... RESET RDY/BUSY 15 A18 16 A17 AT49SV163D( Erase, Erase Suspend/Resume and Program Suspend/Resume commands will not Function Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Write Protection Data Inputs/Outputs No Connect 2.2 48 A16 47 BYTE 46 GND 45 I/O15/A-1 44 I/O7 43 I/O14 42 I/O6 41 I/O13 40 I/ I/O12 ...
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... I/O0 - I/O15/A-1 INPUT BUFFER IDENTIFIER REGISTER STATUS REGISTER COMMAND REGISTER DATA COMPARATOR WRITE STATE MACHINE Y-GATING MAIN MEMORY (I/O8 - I/O15 are don’t care inputs for the command AT49SV163D( RESET BYTE RDY/BUSY PROGRAM/ERASE VOLTAGE SWITCH VCC GND 3 ...
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... Read The AT49SV163D(T) is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins are asserted on the outputs. The outputs are put in the high impedance state whenever high. This dual-line control gives designers flexibility in preventing bus contention. ...
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... Data Polling The AT49SV163D(T) features Data Polling to indicate the end of a program cycle. If the status configuration register is set to a “00”, during a program cycle an attempted read of the last word loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. During a chip or sector erase operation, an attempt to read the device will give a “ ...
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... VPP Status Bit The AT49SV163D(T) provides a status bit on I/O3, which provides information regarding the voltage level of the VPP pin. During a program or erase operation, if the voltage on the VPP pin is not high enough to perform the desired operation successfully, the I/O3 status bit will be a “ ...
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... Protection Register The AT49SV163D(T) contains a 128-bit register that can be used for security purposes in sys- tem design. The protection register is divided into two 64-bit blocks. The two blocks are designated as block A and block B. The data in block A is non-changeable and is programmed at the factory with a unique number ...
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... Hardware Data Protection The Hardware Data Protection feature protects against inadvertent programs to the AT49SV163D(T) in the following ways: (a) V gram function is inhibited. (b) V the device will automatically time out 10 ms (typical) before programming. (c) Program inhibit: holding any one of OE low, CE high or WE high inhibits program cycles. (d) Program inhibit: ...
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... During chip erase, a valid address is any non-protected sector address. 2. I/O7 should be rechecked even if I/O5 = “1” because I/O7 may change simultaneously with I/O5. AT49SV163D(T) 9 Figure 4-2. YES YES Program/Erase ...
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... I/O5 = “1” because the toggle bit may stop toggling as I/O5 changes to “1”. 3656A–FLASH–2/07 Figure 4- Program/Erase Operation Successful, Device in Read Mode Note: AT49SV163D(T) Toggle Bit Algorithm (Configuration Register = 01) START Read I/O7 - I/O0 Read I/O7 - I/O0 NO Toggle Bit = Toggle? YES NO I/ ...
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... I/O7 I/ 00/01 0 TOGGLE 0 0 TOGGLE DATA DATA 0 TOGGLE DATA DATA 1 1 DATA DATA level is not high enough to successfully perform program and erase operations. PP AT49SV163D(T) Status Bit (1) (2) I/O5 I/O3 I/O2 00/01 00/01 00/ TOGGLE 0 0 TOGGLE DATA DATA DATA 0 0 TOGGLE DATA ...
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... If data bit D1 is “0”, block B is locked. If data bit D1 is “1”, block B can be reprogrammed. 10. The default state (after power-up) of the configuration register is “00”. 11. When accessing the data in the CFI table, the address format is A15 - A0 (Hex). AT49SV163D(T) 12 2nd Bus ...
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... AT49SV163D(T) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... AT49SV163D – Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 ...
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... AT49SV163DT – Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 ...
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... The VPP pin can be tied can Refer to “Program Cycle Waveforms” on page 4. V (min) = 1.65V IHPP 5. V (max) = 0.4V. ILPP 6. See details under “Software Product Identification Entry/Exit” 7. Manufacturer Code: 001FH, Device Code: 02C0H - AT49SV163D; 02C2H (x16) - AT49SV163DT. AT49SV163D(T) 16 Ind. ( RESET ...
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... OL1 V Output Low Voltage OL2 V Output High Voltage OH1 V Output High Voltage OH2 Note the erase mode mA. CC 3656A–FLASH–2/07 Condition Min I 0. MHz OUT -400 µA 1 -100 µ 0 AT49SV163D(T) Typ Max Units 2 µA 2 µ µ µA 0 0. ...
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... Input Test Waveforms and Measurement Level 15. Output Test Load 16. Pin Capacitance ( MHz 25°C Symbol OUT Note: 1. This parameter is characterized and is not 100% tested. AT49SV163D( < Typ Max Units Conditions OUT 3656A–FLASH–2/07 ...
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... This parameter is characterized and is not 100% tested. 3656A–FLASH–2/07 (1)(2)(3)( ADDRESS VALID ACC t RO HIGH after the address transition without impact on t ACC after the falling edge of CE without impact AT49SV163D(T) AT49SV163D(T)-80 Min Max 100 OUTPUT VALID . ACC after an address change CE ...
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... Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Write Pulse Width High WPH t Data Setup Time Data, OE Hold Time DH OEH 20. AC Word Load Waveforms 20.1 WE Controlled 20.2 CE Controlled AT49SV163D(T) 20 Min Max Units 3656A–FLASH–2/07 ...
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... PROGRAM CYCLE WPH 555 AAA 555 ADDRESS ( WPH 555 AAA 555 555 WORD 0 WORD 1 WORD 2 WORD 3 12.) AT49SV163D(T) Min Typ Max 10 120 500 16 0.1 2.0 0.5 6 555 INPUT AA DATA AAA Note Note 3 WORD 4 WORD 5 Units µs µ seconds seconds seconds µ ...
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... Read Characteristics” on page OE 27. Toggle Bit Waveforms Notes: 1. Toggling either both OE and CE will operate toggle bit. The t input(s). 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. AT49SV163D(T) 22 (1) (2) 19. t OEH t ...
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... The device returns to standard operation mode. 5. Manufacturer Code: 001FH Device Code: 02C0H – AT49SV163D; 02C2H – AT49SV163DT. Additional Device Code: 0001H – AT49SV163D(T) 6. Either one of the Product ID Exit commands can be used. AT49SV163D(T) 23 30. Sector Lockdown Enable Algorithm LOAD DATA F0 ...
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... AT49SV163D(T) 24 Data Comments 0051h “Q” 0052h “R” 0059h “Y” 0002h 0000h 0041h 0000h 0000h 0000h 0000h 0000h 0017h VCC min write/erase ...
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... Bit 1 – 8 word page, 0 – no, 1 – yes Undefined bits are “0” 0080h Location of protection register lock byte, the section’s first byte 0003h # of bytes in the factory prog section of prot register – 2*n 0003h # of bytes in the user prog section of prot register – 2*n AT49SV163D(T) 25 ...
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... Plastic Chip-Size Ball Grid Array Package (CBGA) 48T 48-lead, Plastic Thin Small Outline Package (TSOP) AT49SV163D(T) 26 Ordering Code Package AT49SV163D-80CU 48C17 AT49SV163D-80TU AT49SV163DT-80CU 48C17 AT49SV163DT-80TU Package Type Operation Range Industrial 48T (-40° to 85°C) Industrial 48T (-40° ...
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... Ball Corner e 2.20 REF Bottom View TITLE 48C17, 48-ball ( Array), 0.80 mm Pitch, 7.0 x 10.0 x 1.0 mm Chip-scale Ball Grid Array Package (CBGA) AT49SV163D( Side View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX E 6.9 7.0 7.1 E1 4.0 TYP D 9.9 10 ...
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... E Notes: 1. This package conforms to JEDEC reference MO-142, Variation DD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT49SV163D(T) 28 PIN SEATING PLANE A1 TITLE ...
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... Revision History Revision No. Revision A – February 2007 3656A–FLASH–2/07 AT49SV163D(T) History • Initial Web Release 29 ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...