MT48H16M16LFBF-75 IT:G TR Micron Technology Inc, MT48H16M16LFBF-75 IT:G TR Datasheet - Page 24

IC SDRAM 256MBIT 132MHZ 54VFBGA

MT48H16M16LFBF-75 IT:G TR

Manufacturer Part Number
MT48H16M16LFBF-75 IT:G TR
Description
IC SDRAM 256MBIT 132MHZ 54VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H16M16LFBF-75 IT:G TR

Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (16Mx16)
Speed
132MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1325-2
Figure 10:
READs
Figure 11:
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 6/09 EN
Example: Meeting
READ Command
COMMAND
READ bursts are initiated with a READ command, as shown in Figure 11.
The starting column and bank addresses are provided with the READ command, and
auto precharge is either enabled or disabled for that burst access. If auto precharge is
enabled, the row being accessed is precharged at the completion of the burst. For the
generic READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address will
be available following the CL after the READ command. Each subsequent data-out ele-
ment will be valid by the next positive clock edge. Figure 7 on page 16 shows general tim-
ing for each possible CL setting.
BA0, BA1
A9, A11
A0–A8
CAS#
RAS#
WE#
A10
CKE
CLK
CS#
CLK
t
RCD (MIN) When 2 <
HIGH
ACTIVE
T0
t CK
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
COLUMN
ADDRESS
ADDRESS
BANK
t
NOP
RCD (MIN)
T1
24
DON’T CARE
t CK
t
RCD (MIN)/
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
t CK
256Mb: x16, x32 Mobile SDRAM
t
CK < 3
READ or
WRITE
DON’T CARE
T3
©2006 Micron Technology, Inc. All rights reserved.
Operations

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