M25P20-VMN6T NUMONYX, M25P20-VMN6T Datasheet - Page 23

• Manufacturer Part Number: M25P20-VMN6T
• Description: IC FLASH 2MBIT 50MHZ 8SOIC
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25P20-VMN6T

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 50MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-1623-2

Release from Deep Power-down and Read
Electronic Signature (RES)
Once the device has entered the Deep Power-
down mode, all instructions are ignored except the
Release from Deep Power-down and Read Elec-
tronic Signature (RES) instruction. Executing this
instruction takes the device out of the Deep Pow-
er-down mode.
The instruction can also be used to read, on Serial
Data Output (Q), the 8-bit Electronic Signature,
whose value for the M25P20 is 11h.
Except while an Erase, Program or Write Status
Register cycle is in progress, the Release from
Deep Power-down and Read Electronic Signature
(RES) instruction always provides access to the 8-
bit Electronic Signature of the device, and can be
applied even if the Deep Power-down mode has
not been entered.
Any Release from Deep Power-down and Read
Electronic Signature (RES) instruction while an
Erase, Program or Write Status Register cycle is in
progress, is not decoded, and has no effect on the
cycle that is in progress.
The device is first selected by driving Chip Select
(S) Low. The instruction code is followed by 3
dummy bytes, each bit being latched-in on Serial
Figure 18. Release from Deep Power-down and Read Electronic Signature (RES) Instruction
Sequence and Data-Out Sequence
Note: The value of the 8-bit Electronic Signature, for the M25P20, is 11h.
S
C
D
Q
0
1
High Impedance
2
Instruction
3
4
5
6
7
MSB
23
8
22 21
9 10
3 Dummy Bytes
3
28 29 30 31 32 33 34 35
2
1
0
Data Input (D) during the rising edge of Serial
Clock (C). Then, the 8-bit Electronic Signature,
stored in the memory, is shifted out on Serial Data
Output (Q), each bit being shifted out during the
falling edge of Serial Clock (C).
The instruction sequence is shown in
The Release from Deep Power-down and Read
Electronic Signature (RES) instruction is terminat-
ed by driving Chip Select (S) High after the Elec-
tronic Signature has been read at least once.
Sending additional clock cycles on Serial Clock
(C), while Chip Select (S) is driven Low, cause the
Electronic Signature to be output repeatedly.
When Chip Select (S) is driven High, the device is
put in the Standby Power mode. If the device was
not previously in the Deep Power-down mode, the
transition to the Standby Power mode is immedi-
ate. If the device was previously in the Deep Pow-
er-down mode, though, the transition to the
Standby Power mode is delayed by t
Chip Select (S) must remain High for at least
t
Standby Power mode, the device waits to be se-
lected, so that it can receive, decode and execute
instructions.
RES2
MSB
7
Electronic Signature Out
Deep Power-down Mode
6
(max), as specified in
5
4
3
36 37 38
2
1
0
Table
t
RES2
17.. Once in the
Stand-by Mode
Figure
RES2
M25P20
AI04047C
, and
18..
23/40