CY7C1361B-117AJC Cypress Semiconductor Corp, CY7C1361B-117AJC Datasheet - Page 20
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CY7C1361B-117AJC
Manufacturer Part Number
CY7C1361B-117AJC
Description
IC SRAM 9MBIT 117MHZ 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1361B-100AC.pdf
(34 pages)
Specifications of CY7C1361B-117AJC
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
117MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1506
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1361B-117AJC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-05302 Rev. *B
Identification Register Definitions
Scan Register Sizes
Identification Codes
Revision Number (31:29)
Device Depth (28:24)
Device Width (23:18)
Cypress Device ID (17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
Instruction
Bypass
ID
Boundary Scan Order
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Register Name
Instruction
Instruction Field
Bit Size (x36)
Code
000
001
010
011
100
101
110
111
71
32
3
1
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state. This instruction is not 1149.1-compliant.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation. This instruction does not implement 1149.1 preload
function and is therefore not 1149.1-compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
00000110100
CY7C1361B
(256Kx36)
000000
100110
Bit Size (x18)
01010
001
1
32
71
3
1
00000110100
CY7C1363B
(512Kx18)
000000
010110
01010
001
1
Description
Describes the version number.
Reserved for Internal Use
Defines memory type and architecture
Defines width and density
Allows unique identification of SRAM vendor.
Indicates the presence of an ID register.
Description
CY7C1361B
CY7C1363B
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