CY7C024-25AXC Cypress Semiconductor Corp, CY7C024-25AXC Datasheet - Page 15

IC SRAM 64KBIT 25NS 100LQFP

CY7C024-25AXC

Manufacturer Part Number
CY7C024-25AXC
Description
IC SRAM 64KBIT 25NS 100LQFP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY7C024-25AXC

Memory Size
64K (4K x 16)
Package / Case
100-LQFP
Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Speed
25ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Access Time
25 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
250 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Ports
2
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2089
CY7C024-25AXC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C024-25AXC
Manufacturer:
CY
Quantity:
29
Part Number:
CY7C024-25AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C024-25AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Waveforms
Note
Document #: 38-06035 Rev. *D
CE
Left Address Valid First:
CE
Right Address Valid First:
42. If t
L
ADDRESS
ADDRESS
R
Valid First:
ADDRESS
ADDRESS
PS
ADDRESS
ADDRESS
Valid First:
is violated, the busy signal is asserted on one side or the other, but there is no guarantee to which side BUSY is asserted.
BUSY
BUSY
BUSY
BUSY
CE
CE
CE
CE
L,R
L,R
R
R
R
L
L
L
R
L
R
R
L
L
Figure 14. Busy Timing Diagram No.2 (Address Arbitration)
(continued)
Figure 13. Busy Timing Diagram No.1 (CE Arbitration)
t
t
PS
PS
ADDRESS MATCH
ADDRESS MATCH
t
t
RC
RC
or t
or t
t
t
PS
PS
WC
WC
t
t
BLA
BLA
ADDRESS MATCH
ADDRESS MATCH
t
t
BLC
BLC
ADDRESS MISMATCH
ADDRESS MISMATCH
t
t
BHA
BHA
t
t
BHC
BHC
[42]
[42]
CY7C024/024A/0241
CY7C025/0251
Page 15 of 21
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