CY62128BLL-70ZXET Cypress Semiconductor Corp, CY62128BLL-70ZXET Datasheet - Page 2
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CY62128BLL-70ZXET
Manufacturer Part Number
CY62128BLL-70ZXET
Description
IC SRAM 1MBIT 70NS 32TSOP
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY62128BNLL-70ZAXE.pdf
(11 pages)
Specifications of CY62128BLL-70ZXET
Format - Memory
RAM
Memory Type
SRAM
Memory Size
1M (128K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Package / Case
32-TSOP I
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document #: 38-05300 Rev. *C
Product Portfolio
Pin Configurations
Pin Definitions
CY62128BLL
Input
Input/Output
Input/Control
Input/Control
Input/Control
Input/Control
Ground
Power Supply
Notes:
2. Typical values are included for reference only and are not tested or guaranteed. Typical values are an average of the distribution across normal production
V
CE
A
A
A
A
WE
A
A
NC
CC
A
variations as measured at V
A
A
A
16
A
A
12
14
15
13
11
7
4
5
6
2
8
9
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Product
Reverse TSOP I
(not to scale)
Industrial
Industrial
Automotive
Top View
A
I/O
WE. Write Enable, Active LOW. When selected LOW, a WRITE is conducted. When selected HIGH, a READ
is conducted.
CE
CE
OE. Output Enable, Active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins behave as
outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins
GND. Ground for the device
V
CC
0
-A
0
1
2
-I/O
. Power supply for the device
. Chip Enable 1, Active LOW.
. Chip Enable 2, Active HIGH.
16
CC
. Address Inputs
7
= 5.0V, T
. Data lines. Used as input or output lines depending on operation
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A
= 25°C, and t
Min.
A
A
A
A
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
CE
A
OE
4.5
3
2
1
0
10
0
1
2
3
4
5
6
7
1
CE
V
WE
A
A
A
A
A
A
NC
A
A
CC
A
A
A
A
11
13
15
16
14
12
9
8
2
7
6
5
4
V
AA
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
CC
= 70 ns.
Typ.
Range (V)
5.0
G g
I/O 0
I/O 1
I/O 2
A 16
A 14
A 12
gnc
G ND
GN
NC
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
[2]
(not to scale)
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Top View
STSOP
SOIC
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Max.
5.5
CE 2
A 10
CE 1
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
V
A 15
WE
A 13
A 8
A 9
OE
A 11
CC
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
OE
A
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
10
0
1
2
3
Speed
1
7
6
5
4
3
2
1
0
(ns)
70
70
55
CE
V
A
A
WE
A
A
A
A
NC
A
A
CC
A
A
A
A
11
13
15
16
14
12
9
8
2
7
6
5
4
Typ.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Operating, I
7.5
6
6
[2]
(mA)
Power Dissipation
(not to scale)
Top View
Max.
TSOP I
20
15
25
CC
CY62128B
Typ.
Standby, I
2.5
2.5
2.5
MoBL
Page 2 of 11
[2]
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
25
(µA)
OE
A
CE
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
I/O
10
0
1
2
3
Max.
1
7
6
5
4
3
2
1
0
SB2
15
15
25