AT17LV010A-10JC Atmel, AT17LV010A-10JC Datasheet - Page 4

• Manufacturer Part Number: AT17LV010A-10JC
• Description: IC CONFIG SEEPROM 1M 3.3V 20PLCC
• Manufacturer: Atmel

Specifications of AT17LV010A-10JC

• Programmable Type: Serial EEPROM
• Memory Size: 1Mb
• Voltage - Supply: 3 V ~ 3.6 V, 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AT17LV010A10JC

3. Device Description
4. Pin Description
Note:
4
Name
DATA
DCLK
WP1
RESET/
nCS
GND
nCASC
A2
READY
SER_EN
V
CC
1. The nCASC feature is not available on the AT17LV65A device.
OE
AT17LV65A/128A/256A/512A/002A
I/O
I/O
O
O
I
I
I
I
I
I
AT17LV128A/
AT17LV256A
AT17LV65A/
The control signals for the configuration EEPROM (nCS, RESET/OE and DCLK) interface
directly with the FPGA device control signals. All FPGA devices can control the entire configura-
tion process and retrieve data from the configuration EEPROM without requiring an external
controller.
The configuration EEPROM’s RESET/OE and nCS pins control the tri-state buffer on the DATA
output pin and enable the address counter and the oscillator. When RESET/OE is driven Low,
the configuration EEPROM resets its address counter and tri-states its DATA pin. The nCS pin
also controls the output of the AT17A series configurator. If nCS is held High after the
RESET/OE pulse, the counter is disabled and the DATA output pin is tri-stated. When nCS is
driven subsequently Low, the counter and the DATA output pin are enabled. When RESET/OE
is driven Low again, the address counter is reset and the DATA output pin is tri-stated, regard-
less of the state of the nCS.
When the configurator has driven out all of its data and nCASC is driven Low, the device tri-
states the DATA pin to avoid contention with other configurators. Upon power-up, the address
counter is automatically reset.
This is the default setting for the device. Since almost all FPGAs use RESET Low and OE High,
this document will describe RESET/OE.
PLCC
20
10
12
18
20
2
4
–
8
9
–
PDIP
8
1
2
–
3
4
5
6
–
7
8
AT17LV512A/
AT17LV010A
PLCC
20
10
12
15
18
20
2
4
5
8
9
TQFP
20
32
31
10
12
15
23
27
2
4
7
PLCC
20
10
12
15
18
20
2
4
5
8
9
AT17LV002A
2322G–CNFG–03/06
TQFP
32
31
10
12
15
20
23
27
2
4
7