AT17LV65A-10JI Atmel, AT17LV65A-10JI Datasheet
AT17LV65A-10JI
Specifications of AT17LV65A-10JI
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AT17LV65A-10JI Summary of contents
Page 1
... EEPROM bytes.These devices also support a write-protection mechanism within its programming mode. Note: 1. The 8-lead LAP, PDIP and SOIC packages for the AT17LV65A/128A/256A do not have an A label. However, the 8-lead packages are pin compatible with the 8-lead package of Altera’s EEPROMs, refer to the AT17LV65/128/256/512/010/002/040 datasheet available on the Atmel web site for more information ...
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... RESET/OE 8 32-lead TQFP NC 1 DCLK (3) (WP1 ) RESET/ This pin is only available on AT17LV65A/128A/256A devices. 2. This pin is only available on AT17LV512A/010A/002A devices. 3. This pin is only available on AT17LV010A/002A devices. 4. The nCASC feature is not available on the AT17LV65A device VCC 2 7 SER_EN ( (A2) nCASC 4 5 GND 18 SER_EN ( (READY ) ...
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... Figure 2-4. Block Diagram SER_EN (2) WP1 OSCILLATOR CONTROLL (3) OSCILLATOR POWER ON RESET DCLK READY Notes: 1. This pin is only available on AT17LV65A/128A/256A devices. 2. This pin is only available on AT17LV512A/010A/002A devices. 3. The nCASC feature is not available on the AT17LV65A device. 2322G–CNFG–03/06 AT17LV65A/128A/256A/512A/002A (2) nCS RESET/OE (1) (WP ) nCASC 3 ...
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... Pin Description AT17LV65A/ AT17LV128A/ AT17LV256A 20 Name I/O PLCC DATA I/O 2 DCLK I 4 WP1 I – RESET nCS I 9 GND 10 nCASC READY O – SER_EN Note: 1. The nCASC feature is not available on the AT17LV65A device. AT17LV65A/128A/256A/512A/002A 4 AT17LV512A/ AT17LV010A PDIP PLCC TQFP – – AT17LV002A 20 32 ...
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... WP Write protect (WP) input (when nCS is Low) during programming only (SER_EN Low). When WP is Low, the entire memory can be written. When WP is enabled (High), the lowest block of the memory cannot be written. This pin is only available on AT17LV65A/128A/256A devices. 4.6 nCS Chip Select input (active Low). A Low input (with OE High) allows DCLK to increment the address counter and enables DATA to drive out ...
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... After configuration is complete, the address counters of all cascaded configurators are reset if the RESET/OE on each configurator is driven to a Low level. If the address counters are not to be reset upon completion, then the RESET/OE input can be tied to a High level. AT17LV65A devices do not have the The AT17LV65A/128A/256A/512A/002A 6 (except during ISP) ...
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... Standby Mode The AT17LV65A/128A/256A enters a low-power standby mode whenever nCS is asserted High. In this mode, the configurator consumes less than 50 µA of current at 3.3V (100 µA for the AT17LV512A/010A/002A). The output remains in a high-impedance state regardless of the state of the RESET/OE input ...
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... L I Supply Current, Standby Mode CCS1 AT17LV65A/128A/256A/512A/002A 8 AT17LV65A/ AT17LV128A/ AT17LV256A Min 2 -2.5 mA) 2.4 Commercial = +3 mA mA) 2.4 Industrial = +3 mA GND) - Commercial Industrial AT17LV65A/ AT17LV128A/ AT17LV256A Min 2 -2.5 mA) 3.7 Commercial = +3 mA mA) 3.6 Industrial = +3 mA GND) - Commercial Industrial AT17LV512A/ AT17LV010A AT17LV002A Max Min Max ...
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... AC Waveforms nCS RESET/OE DCLK T CE DATA 16. AC Waveforms when Cascading RESET/OE nCS DCLK T CDF LAST BIT DATA T OCK nCASL 2322G–CNFG–03/06 AT17LV65A/128A/256A/512A/002A T SCE CAC T OCE T SCE T HCE T HOE FIRST BIT T OOE T OCE 9 ...
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... Float delays are measured with loads. Transition is measured ± 200 mV from steady-state active levels. AT17LV65A/128A/256A/512A/002A 10 AT17LV65A/128A/256A AT17LV512A/010A/002A Commercial Industrial Commercial Min Max Min Max Min AT17LV65A/128A/256A AT17LV512A/010A/002A Commercial Industrial Commercial Min Max Min Max Min 12.5 Industrial Max Min Max Units ...
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... Float delays are measured with loads. Transition is measured ± 200 mV from steady-state active levels. 2322G–CNFG–03/06 AT17LV65A/128A/256A/512A/002A AT17LV65A/128A/256A AT17LV512A/010A/002A Commercial Industrial Commercial Min Max Min Max Min 12.5 12.5 15 AT17LV65A/128A/256A AT17LV512A/010A/002A Commercial Industrial Commercial Min Max Min Max Min 12.5 Industrial Max Min Max Units ...
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... Thin Plastic Quad Flat Package 32A (TQFP) 44J Plastic Leaded Chip Carrier (PLCC) Notes: 1. For more information refer to the “Thermal Characteristics of Atmel’s Packages”, available on the Atmel web site. 2. Airflow = 0 ft/min. AT17LV65A/128A/256A/512A/002A 12 (1) AT17LV65A/ AT17LV128A/ AT17LV256A θ [°C/W] JC θ (2) [°C/W] JA θ ...
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... Nominal Note: 1. The 8-lead LAP and SOIC packages for the AT17LV65A/128A/256A do not have an A label. However, the 8-lead packages are pin compatible with the 8-lead package of Altera’s EEPROMs, refer to the AT17LV65/128/256/512/010/002/040 datasheet available on the Atmel web site for more information. ...
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... Use 2-Mbit density parts to replace Altera EPC2. Atmel AT17LV002A devices do not support JTAG programming; Atmel AT17LV002A devices use a 2-wire serial interface for in-system programming. 7. For operating voltage of 5V ±10%, please refer to the 5V ±10% AC and DC Characteristics. AT17LV65A/128A/256A/512A/002A 14 (1) Ordering Code AT17LV65A-10JC AT17LV65A-10JI AT17LV128A-10JC AT17LV128A-10JI AT17LV256A-10JC AT17LV256A-10JI AT17LV512A-10JC AT17LV512A-10PI AT17LV512A-10JI ...
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... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R 2322G–CNFG–03/06 AT17LV65A/128A/256A/512A/002A ...
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... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT17LV65A/128A/256A/512A/002A 16 PIN NO. 1 1.14(0.045) X 45˚ IDENTIFIER e E1 ...
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... This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R 2322G–CNFG–03/06 AT17LV65A/128A/256A/512A/002A B PIN 1 IDENTIFIER TITLE 32A, 32-lead Body Size, 1 ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...