AT17F040-30VJC Atmel, AT17F040-30VJC Datasheet
AT17F040-30VJC
Specifications of AT17F040-30VJC
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AT17F040-30VJC Summary of contents
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... AT17F Series Packages Package 8-lead LAP 20-lead PLCC 44-lead TQFP ® ® FLEX , APEX XC3000, XC4000, XC5200, Spartan AT17F040 Yes Yes – FPGA ™ Devices, ® ® , Virtex FPGAs, Configuration Flash Memory AT17F040 AT17F080 AT17F080 Yes Yes Yes 3039K–CNFG–2/08 ...
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... GND 20-lead PLCC CLK RESET/OE 6 PAGESEL1 20-lead PLCC (Virtex Pinout RESET/ 20-lead PLCC (Virtex pinout) is only available in the AT17F040. 2. Virtex pinout is compatible with the XC17V and XC18V Series PROM SER_EN 16 PAGE_EN 15 READY 14 CEO (A2) (1)(2) 18 SER_EN READY 14 NC 3039K–CNFG–2/08 ...
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... 3039K–CNFG–2/08 44 TQFP AT17F040/080 READY 3 ...
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... DATA output pin is tri-stated, regardless of the state of CE. When the configurator has driven out all of its data and CEO is driven Low, the device tri-states the DATA pin to avoid contention with other configurators. Upon power-up, the address counter is automatically reset. AT17F040/080 4 Clock/Oscillator Reset ...
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... AT17F040 20 PLCC 8 20 LAP PLCC (Virtex – 16 – – 11 – – 7 – – This pin has an internal 20 KΩ pull-up resistor. 2. This pin has an internal 30 KΩ pull-down resistor. AT17F040/080 AT17F080 LAP PLCC TQFP – – – – ...
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... CE until OE goes Low; thereafter, CEO will stay High until the entire EEPROM is read again. Notes: AT17F040/080 6 Address Space AT17F040 (4 Mbits) 00000 – 0FFFFh 10000 – 1FFFFh 20000 – 2FFFFh 30000 – 3FFFFh 00000 – 3FFFFh 1. This pin has an internal 20 kΩ pull-up resistor. ...
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... The serial enable input must remain High during FPGA configuration operations. Bringing SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications, SER_EN should be tied +3.3V (±10%). Notes: 3039K–CNFG–2/ This pin has an internal 20 kΩ pull-up resistor. 2. This pin has an internal 30 kΩ pull-down resistor. AT17F040/080 7 ...
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... The AT17F parts are read/write at 3.3V nominal. Refer to the AT17F Programming Specification available on the Atmel web site (www.atmel.com) for more programming details. AT17F devices are supported by the Atmel ATDH2200 programming system along with many third party programmers. AT17F040/080 8 (except during ISP ...
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... Exposure to Abso- lute Maximum Rating conditions for extended periods of time may affect device reliability. AT17F Series Configurator Min Max 2.97 3.63 2.97 3.63 AT17F040 AT17F080 Min Max Min 2 ...
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... AC Characteristics CE RESET/OE CLK T CE DATA 15. AC Characteristics when Cascading RESET/OE CE CLK T DATA LAST BIT T CEO AT17F040/080 10 T SCE CAC CDF T OCK OCE T SCE T HCE T HOE FIRST BIT T OOE T OCE 3039K–CNFG–2/08 ...
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... Industrial Commercial 3 (1) Industrial Commercial 0 (1) Industrial 0 Commercial (1) Industrial Commercial 15 (1) Industrial 15 Commercial 15 (1) Industrial 15 Commercial 20 (1) Industrial 25 Commercial 0 (1) Industrial 0 Commercial 20 (1) Industrial 20 Commercial (1) Industrial Commercial (1) Industrial Commercial (1) Industrial Commercial (1) Industrial AT17F040/080 Max Units MHz 10 MHz 33 MHz 33 MHz 12 µs 12 µ ...
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... T RESET/OE to CEO Delay OOE F Maximum Input Clock Frequency MAX Notes test lead = 50 pF. 2. Float delays are measured with loads. Transition is measured ± 200 mV from steady-state active levels. AT17F040/080 12 AT17F040 Min Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial ...
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... Plastic Leaded Chip Carrier (PLCC) 44A Thin Plastic Quad Flat Package (TQFP) Note: 1. Airflow = 0 ft/min. 3039K–CNFG–2/08 AT17F040 θ [° C/W] JC θ (1) [° C/W] JA θ [° C/W] JC θ (1) [° C/W] JA θ [° C/W] – JC θ (1) [° C/W] – JA AT17F040/080 AT17F080 – – – – ...
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... Leadless Array Package (LAP) – Pin-compatible with 8-lead 8CN4 SOIC/VOIC Packages 20J 20-lead, Plastic J-leaded Chip Carrier (PLCC) 44A 44-lead, Thin (1.0 mm) Plastic Quad Flat Package Carrier (TQFP) AT17F040/080 14 Ordering Code AT17F040-30VJC AT17F040-30VJI AT17F080-30TQC AT17F080-30TQI Ordering Code AT17F040-30CU AT17F040-30JU AT17F080-30CU AT17F080-30JU Package Type ...
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... Au: 0.0005 to 0.001 mm Package Drawing Contact: packagedrawings@atmel.com 3039K–CNFG–2/08 D Pin1 Corner TITLE 8CN4, 8-lead ( 1.04 mm Body), Lead Pitch 1.27mm, Leadless Array Package (LAP) AT17F040/080 A A1 Side View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 0.94 1.04 1.14 A1 0.30 0.34 0. ...
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... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT17F040/080 16 PIN NO. 1 1.14(0.045) X 45˚ IDENTIFIER e E1 ...
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... Orchard Parkway San Jose, CA 95131 R 3039K–CNFG–2/08 B PIN 1 IDENTIFIER TITLE 44A, 44-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) AT17F040/080 A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM A – – A1 0.05 – ...
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... Revision History Revision Level – Release Date J – March 2006 K – February 2008 AT17F040/080 18 History Added last-time buy for AT17FXXX-30CC and AT17FXXX-30CI. Removed -30JC, -30JI, -30BJC and -30BJI devices from ordering information. 3039K–CNFG–2/08 ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...