VIPER53SP STMicroelectronics, VIPER53SP Datasheet - Page 16

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VIPER53SP

Manufacturer Part Number
VIPER53SP
Description
IC OFFLINE SWIT PWM CM POWERSO10
Manufacturer
STMicroelectronics
Series
VIPER™r
Datasheet

Specifications of VIPER53SP

Output Isolation
Isolated
Frequency Range
93 ~ 300kHz
Voltage - Input
8.4 ~ 19 V
Voltage - Output
620V
Power (watts)
40W
Operating Temperature
25°C ~ 125°C
Package / Case
PowerSO-10 Exposed Bottom Pad
For Use With
497-8435 - BOARD EVAL FOR VIPER53 28W497-6458 - BOARD EVAL BASED ON VIPER53-E497-6262 - BOARD REF SGL VIPER53 90-264VAC497-5866 - EVAL BOARD 24W NEG OUT VIPER53E497-4933 - BOARD PWR SUPPLY 24W OUTPUT VIPE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-3289-5

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VIPer53DIP / VIPer53SP
charging current is reduced down to I
is about 0.6 mA. This lower current leads to a slope
change on the V
switching for a V
auxiliary winding delivers some energy to the V
capacitor after the start-up time tss.
The charging current change at V
complete start-up time tsu, and maintains a low
restart duty cycle. This is especially useful for short
circuits and overloads conditions, as described in
the following section.
SHORT-CIRCUIT AND OVERLOAD
PROTECTION
A V
implemented on the COMP pin. When V
above this level, the capacitor connected on the
TOVL pin begins to charge. When reaching
typically 4 V (V
disabled and the device stops switching. This state
is latched thanks to the regulation loop which
maintains the COMP pin voltage above the
V
receive any more energy from the auxiliary
winding, its voltage drops down until it reaches
VDDoff and the device is reset, recharging the
VDD capacitor for a new restart cycle. Note that if
VCOMP drops down below the V
for any reason during the VDD drop, the device
resumes switching immediately.
The device enters an endless restart sequence if
the
maintained. The restart duty cycle D
as the time ratio for which the device tries to
restart, thus delivering its full power capability to
the output. In order to keep the whole converter in
a safe state during this event, D
as low as possible, without compromising the real
start up of the converter. A typical value of about
10 % is generally sufficient. For this purpose, both
VDD and TOVL capacitors can be used to satisfy
the following conditions:
C
C
Refer to the previous start-up section for the
definition of tss, and C
against the limit given in this section. The
maximum value of the two calculus will be
adopted.
All this behavior can be observed on figure 4. In
Figure 8 the value of the drain current Id for
V
parameter I
account
represents the maximum value for which the
16/24
COMPovl
COMP
OVL
VDD
COMPovl
overload
=V
12.5 10
8 10
COMPovl
threshold. Since the VDD pin doesn’t
for
Dmax
threshold of about 4.35 V has been
4
OVLth
6 –
design
----------- -
D
or
is the drain current to take into
RST
1
tss
is shown. The corresponding
DD
DD
), the internal mosfet driver is
short
VDD
equal to V
1
rise. The device starts
purpose.
C
--------------------------------- -
must also be checked
circuit
OVL
V
DDhyst
COMPovl
RST
DDoff
I
DDon
DDc h2
RST
Since
must be kept
condition
allows a fast
DDch2
COMP
, and the
is defined
threshold
which
I
goes
Dmax
DD
is
overload protection is not triggered, it defines the
power capability of the power supply.
TRANSCONDUCTANCE ERROR AMPLIFIER
The VIPer53 includes a transconductance error
amplifier. Transconductance Gm is the change in
output current I
voltage V
Gm
The output impedance Z
amplifier (COMP pin) can be defined as:
Z
This last equation shows that the open loop gain
A
where Gm value for VIPer53 is typically 1.4 mA/V.
Gm is well defined by specification, but Z
therefore A
impedance Z must be connected between the
COMP pin and ground in order to define accurately
the transfer function F of the error amplifier,
according to the following equation, very similar to
the one above:
The error amplifier frequency response is shown in
figure 10 for different values of a simple resistance
connected on the COMP pin. The unloaded
transconductance error amplifier shows an internal
Z
impedances can be connected on the COMP pin to
achieve different compensation methods. A
capacitor provides an integrator function, thus
eliminating the DC static error, and a resistance in
series leads to a flat gain at higher frequency,
Figure 18: Typical Compensation Network
A
F s ( )
C OMP
COMP
VOL
VOL
=
=
can be related to Gm and Z
=
I
V
=
COMP
Gm Z s ( )
DD
Gm Z
of
DD
OSC
V
I
COMP
VOL
COMP
. Thus:
15V
about
COM P
are subject to large tolerances. An
TOVL
COMP
=
VDD
-------- -
Gm
1
140
versus change in input
COMP
V
V
10nF
COMP
COM P
DD
K .
Rcomp
Ccomp
at the output of this
SOURCE
DRAIN
COMP
More
:
COMP
complex
and

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