NCP1377DR2G ON Semiconductor, NCP1377DR2G Datasheet - Page 7

• Manufacturer Part Number: NCP1377DR2G
• Description: IC CTRLR PWM CM OVP UVLO 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1377DR2G

• Output Isolation: Isolated
• Frequency Range: 100kHz
• Voltage - Input: 8.2 ~ 18 V
• Operating Temperature: 0°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Number Of Outputs: 1
• Output Voltage: 18 V
• Output Current: 500 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 100 KHz
• Maximum Operating Temperature: + 150 C
• Fall Time: 20 ns
• Rise Time: 40 ns
• Synchronous Pin: No
• Topology: Flyback
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1377DR2GOS; NCP1377DR2GOS; NCP1377DR2GOSTR

architecture where the switch−off time is dictated by the
peak current setpoint, whereas the core reset detection
triggers the turn−on event. This component represents the
ideal candidate where low part−count is the key parameter,
particularly in low−cost AC−DC adapters, consumer
electronics, auxiliary supplies, etc. Due to its high−
performance high−voltage technology, the NCP1377
incorporates all the necessary components/features needed
to build a rugged and reliable Switchmode Power Supply
(SMPS):
•
•
•
•
The NCP1377 implements a standard current mode
60
50
40
30
20
10
Transformer Core Reset Detection: Borderline/critical
operation is ensured whatever the operating conditions
are. As a result, there are virtually no primary switch
turn−on losses and no secondary diode recovery
losses. The converter also stays a first−order system
and accordingly eases the feedback loop design.
Quasi−Resonant Operation: By delaying the turn−on
event, it is possible to restart the MOSFET in the
minimum of the drain−source wave, ensuring reduced
EMI/video noise perturbations. In nominal power
conditions, the NCP1377 operates in Borderline
Conduction Mode (BCM) also called Critical
Conduction Mode.
Undervoltage Lockout (UVLO): When Vcc falls below
V
drops down to a few hundred of mA. When Vcc
reaches the latchoff level (5.6 V typical), the startup
current source is activated and brings Vcc back to
Vcc
Overvoltage Protection (OVP): By sampling the
plateau voltage on the demagnetization winding, the
0
−50
CCoff
Figure 15. DMG Pin Internal Resistance versus
on
where the IC attempts to startup.
−30
pulses are stopped and the IC consumption
APPLICATION INFORMATION
−10
TEMPERATURE (°C)
INTRODUCTION
10
Temperature
30
50
70
90
110
http://onsemi.com
130
7
•
•
•
Startup Sequence
outlet, the internal current source (typically 4.0 mA) is
biased and charges up the Vcc capacitor. When the voltage
on this Vcc capacitor reaches the Vcc
12.5 V), the current source turns off and no longer wastes
any power. At this time, the Vcc capacitor only supplies the
controller and the auxiliary supply is supposed to take over
before Vcc collapses below V
internal arrangement of this structure.
Vcc
When the power supply is first powered from the mains
NCP1377 goes into latched fault condition whenever
an overvoltage condition is detected. The controller
stays fully latched in this position until the Vcc is
cycled down to 4.0 V, e.g. when the user unplugs the
power supply from the mains outlet and replugs it.
External Latch Trip Point: By externally forcing a
level on the OVP greater than the internal setpoint, it
is possible to latchoff the IC, e.g. with a signal coming
from a temperature sensor.
Adjustable Skip Cycle Level: By offering the ability
to tailor the level at which the skip cycle takes place,
the designer can make sure that the skip operation
only occurs at low peak current. This point guarantees
a noise−free operation with cheap transformer. This
option also offers the ability to fix the maximum
switching frequency when entering light load conditions.
Overcurrent Protection (OCP): NCP1377 enters burst
mode as soon as the power supply undergoes an
overload which is detected through the sense of the
auxiliary voltage. As detailed above, as soon as Vcc
crosses the undervoltage lockout level (VCCoff in the
electrical table), all pulses are stopped and the device
enters a safe low power operation which prevents from
any lethal thermal runaway. By monitoring the Vcc
level, the startup current source is activated ON and
OFF to create a kind of burst mode where the SMPS
tries to restart. If the fault has gone, the SMPS
resumes operation. On the other hand, if the fault is
still there, the burst sequence starts again.
Figure 16. The Current Source Brings Vcc Above
ON
/Vcc
OFF
Vcc
+
−
ON
and Then Turns Off
CCoff
IC1 or 0
. Figure 16 shows the
8
6
4
ON
level (typically
CV
HV
CC
Aux