LTC4012IUF-1#TRPBF Linear Technology, LTC4012IUF-1#TRPBF Datasheet - Page 19

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LTC4012IUF-1#TRPBF

Manufacturer Part Number
LTC4012IUF-1#TRPBF
Description
IC CTLR BATT CHARGER CC/CV 20QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4012IUF-1#TRPBF

Function
Charge Management
Battery Type
Multi-Chemistry
Voltage - Supply
6 V ~ 28 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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applications inForMation
The first option is to lower the power dissipation of R
the expense of accuracy without changing the input current
limit value. The second is to make the input current limit
value programmable.
The overall accuracy of this circuit needs to be better
than the power source current tolerance or be margined
such that the worse-case error remains under the power
source limits.
The accuracy of the Figure 7 circuit is a function of the
INTV
accuracy, the tolerance of R
5.1k, 5% to a 2.49k 1% resistor. R
resistors R1 and R3 should also be 1% tolerance such
that the dominant error is INTV
can be 5%. When choosing NPN transistors, both need
to have good gain (>100) at 10µA levels. Low gain NPNs
will increase programming errors. Q1 must be a matched
NPN pair. Since R
capacitor value of C
effective at filtering out any noise.
If you wish to reduce R
current limit, the programming equation becomes:
If you wish to make the input current limit programmable,
the equation becomes:
The equation governing R2 for both applications is based
on the value of R1. R3 should always be equal to R1.
I
R
R2 = 0.875 • R1
LIM
CL
DD
, V
=
=
100
100
BE
, R
mV
mV
CL
, R
F
R
I
has been reduced in value by half, the
LIM
 
 
F
F
CL
5 2 49
, R1 and R3 tolerances. To improve
5 2 49
should double to 0.22µF to remain
• .
• .
CL
R
R
1
1
power dissipation for a given
k
k
F
 
 
DD
should be changed from
CL
(±3%). Bias resistor R2
and the programming
CL
at
In many notebook applications, there are situations
where two different I
different power adapters or power sources to be used.
In such cases, start by setting R
I
I
the three ground connections shown in Figure 7, combine
them into one common connection and use a small-signal
NFET (2N7002) to open or close that common connec-
tion to circuit ground. When the NFET is off, the circuit
is defeated (floating) allowing I
value. When the NFET is on, the circuit will become active
and I
Monitoring Charge Current
The PROG pin voltage can be used to indicate charge cur-
rent where 1.2085V indicates full programmed current (1C)
and zero charge current is approximately equal to R
11.67µA. PROG voltage varies in direct proportion to the
charge current between this zero-current (offset) value and
1.2085V. When monitoring the PROG pin voltage, using a
buffer amplifier as shown in Figure 8 will minimize charge
current errors. The buffer amplifier may be powered from
the INTV
charger is on.
LIM
LIM
configuration and then use Figure 7 to set the lower
value. To toggle between the two I
LIM
DD
will drop to the lower set value.
LTC4012
pin or any supply that is always on when the
LTC4012-1/LTC4012-2
INTV
PROG
Figure 8. PROG Voltage Buffer
DD
17
13
LIM
<30nA
values are needed to allow two
+
LIM
4012 F08
LIM
to be the maximum
LTC4012/
for the high power
TO SYSTEM
MONITOR
LIM
values, take

PROG
4012fa

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