IR21771STRPBF International Rectifier, IR21771STRPBF Datasheet - Page 15
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IR21771STRPBF
Manufacturer Part Number
IR21771STRPBF
Description
IC CURRENT SENSE 16SOIC
Manufacturer
International Rectifier
Datasheet
1.IR21771STRPBF.pdf
(16 pages)
Specifications of IR21771STRPBF
Function
Current Sense
Voltage - Input
8 ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Accuracy
-
Sensing Method
-
c) Bootstrap Capacitor
For high T
tank capacitor, its ESR must be considered. This
parasitic resistance develops a voltage divider with
R
charge of bootstrap capacitor. The voltage step and
the related speed (dV
general rule, ESR should meet the following
constraint:
Parallel combination of small ceramic and large
electrolytic
compromise, the first acting as fast charge thank for
the gate charge only and limiting the dV
reducing the equivalent resistance while the second
keeps the V
d) Bootstrap Diode
The diode must have a BV> 600V (or 1200V
depending on application) and a fast recovery time
(t
back from the bootstrap capacitor to V
3
3.1 Distance from H to L voltage
The IR22771S/IR21771S package (wide body)
maximizes the distance between floating (from DC-
to DC+) and low voltage pins (V
recommended to place components tied to floating
voltage in the respective high voltage portions of the
device (V
3.2 Ground plane
Ground plane must NOT be placed under or nearby
the high voltage floating side to minimize noise
coupling.
15
rr
boot
< 100 ns) to minimize the amount of charge fed
Vin+
Vin-
VB
VS
generating a voltage step on V
PCB LAYOUT TIPS
B
, V
HON
Figure 17: antenna loops
BS
S
capacitors
ESR
) side.
voltage drop inside the desired ∆V
designs where is used an electrolytic
ESR
+
R
BS
BOOT
/dt) should be limited. As a
is
⋅
V
CC
normally
Antenna
Loop
≤
3
SS
V
). It’s strongly
CC
BS
supply.
at the first
the
BS
/dt by
best
BS
.
3.3 Antenna loops and inputs
connection
Current loops behave like antennas able to receive
EM noise. In order to reduce EM coupling, loops
must be reduced as much as possible. Figure 17
shows the high side shunt loops.
Moreover it is strongly suggested to use Kelvin
connections for V
connect V
explained in Fig. 18.
3.4 Supply capacitors
The supply capacitors must be placed as close as
possible to the device pins (V
ground tied supply, V
supply) in order to minimize parasitic traces
inductance/resistance.
Figure 18: Recommended shunt connection
IR22771S/IR21771S(PbF)
S
to V
Vin+
Vin-
VB
VS
in-
in+
and V
close to the shunt resistor as
B
www.irf.com
in-
and V
to shunt paths and star-
CC
S
and V
for the floating
SS
for the