TC14433EPG Microchip Technology, TC14433EPG Datasheet - Page 6

• Manufacturer Part Number: TC14433EPG
• Description: IC ADC 3 1/2 DIGIT 24DIP
• Manufacturer: Microchip Technology

Specifications of TC14433EPG

• Display Type: LED
• Configuration: 7 Segment
• Interface: BCD
• Digits Or Characters: A/D 3.5 Digits
• Current - Supply: 1.8mA
• Voltage - Supply: 4.5 V ~ 8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.600", 15.24mm)
• Resolution (bits): 3.5bit
• Sampling Rate: 25SPS
• Input Channel Type: Single Ended
• Data Interface: BCD
• Supply Current: 800µA
• Digital Ic Case Style: DIP
• No. Of Pins: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TC14433/A
3.0
The descriptions of the pins are listed in
DS21394D-page 6
TABLE 3-1:
24-Pin PDIP,
Pin No.
SOIC
10
11
12
13
14
15
PIN DESCRIPTIONS
1
2
3
4
5
6
7
8
9
PIN FUNCTION TABLE
Pin No.
28-Pin
PLCC
10
12
13
14
16
17
18
11
2
3
4
5
6
7
9
Symbol
R
CLK
CLK
V
EOC
CO
CO
V
V
V
OR
DU
V
R
1
C
REF
AG
EE
SS
/C
X
1
1
1
2
1
0
1
Table
This is the analog ground. It has a high input impedance. The pin determines
the reference level for the unknown input voltage (V
voltage (V
Reference voltage – Full scale output is equal to the voltage applied to V
Therefore, full scale voltage of 1.999V requires 2V reference and 199.9 mV
full scale requires a 200 mV reference. V
When switched to V
conversion cycle.
The unknown input voltage (V
voltage (V
This pin is for external components used for the integration function in the
dual slope conversion. Typical values are 0.1 µF (Mylar) capacitor for C
R
R
250 ms conversion time.
These pins are used for connecting the offset correction capacitor. The
recommended value is 0.1 µF.
These pins are used for connecting the offset correction capacitor. The
recommended value is 0.1 µF.
Display update input pin. When DU is connected to the EOC output, every
conversion is displayed. New data will be strobed into the output latches
during the conversion cycle if a positive edge is received on DU, prior to the
ramp down cycle. When this pin is driven from an external source, the
voltage should be referenced to V
Clock input pins. The TC14433 has its own oscillator system clock.
Connecting a single resistor between CLK
frequency.
A crystal or OC circuit may be inserted in lieu of a resistor for improved
CLK
need only have standard CMOS output drive. This pin is referenced to V
for external clock inputs. A 300 kΩ resistor yields a clock frequency of about
66 kHz. See Section 2.0 “Typical Performance Curves”. (Also see
Figure 5-3
Negative power current. Connection pin for the most negative supply. Please
note the current for the output drive circuit is returned through V
supply current is 0.8 mA.
Negative power supply for output circuitry. This pin sets the low voltage level
for the output pins (BCD, Digit Selects, EOC, OR). When connected to
analog ground, the output voltage is from analog ground to V
connected to V
operating range for V
End of conversion output generates a pulse at the end of each conversion
cycle. This generated pulse width is equal to one half the period of the
system clock.
Overrange pin. Normally this pin is set high. When V
is low.
1
1
= 470 kΩ (resistor) for 2V full scale.
= 27 kΩ (resistor) for 200 mV full scale. Clock frequency of 66 kHz gives
1
, the clock input, can be driven from an external clock source, which
3-1.
REF
REF
for alternate circuits.)
).
) in a ratiometric A/D conversion.
EE
, the output swing is from V
EE
SS
, the system is reset to the beginning of the
is between the V
X
) is measured as a ratio of the reference
Description
SS
.
REF
DD
1
and CLK
-3 volts and V
functions as system reset also.
EE
© 2008 Microchip Technology Inc.
to V
X
DD
X
0
) and the reference
exceeds V
sets the clock
. The recommended
EE
.
DD
. If
SS
REF
. Typical
the OR
1
REF
EE
.
.