MAX6962ATH+T Maxim Integrated Products, MAX6962ATH+T Datasheet - Page 26

• Manufacturer Part Number: MAX6962ATH+T
• Description: IC DRVR LED 8X8 44-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX6962ATH+T

• Display Type: LED
• Configuration: 8 x 8 (Matrix)
• Interface: 4-Wire Serial
• Digits Or Characters: Any Digit Type
• Current - Supply: 7.5mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 44-TQFN Exposed Pad
• Number Of Segments: 64
• Low Level Output Current: 750 mA
• High Level Output Current: 48 mA
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Supply Current: 9 mA
• Maximum Power Dissipation: 2162 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

digit 1 in the same manner. The MAX6960 is guaran-
teed to drive 40mA peak segment current into a 2.4V
LED with a minimum supply voltage of 3.15V, and
20mA peak segment current into a 2.2V LED with a
minimum supply voltage of 2.7V.
The global driver indirect address register is used to
store the driver address identifying which of 256
MAX6960s is accessed for 16-bit transmission when a
local register is read (Table 28).
The global display indirect address registers are used
to store the 14-bit display memory address identifying
which byte of display memory across all the intercon-
nected MAX6960s is written by an 8-bit transmission
(Table 29). The 14-bit address stored in these two reg-
isters increments after every 8-bit transmission, and
overflows from address 0x3FFF to address 0x0000.
The global plane counter (Table 30) allows any display
plane to be selected as the current display plane, or
configures the MAX6960 for automatic plane sequenc-
ing. The display plane is switched to the newly selected
plane on the rising edge of CS at the end of the 16-bit
transmission. When automatic plane sequencing is
selected, the current display plane is initialized to plane
P0. The current display plane is incremented through
all four planes P0–P3 (planes/intensity = 0) or both
planes P0–P1 (planes/intensity = 1) at the frame rate
selected, and then restarts at plane P0 again. The
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
Table 30. Global Plane Counter Register Format (continued)
26
Auto fast plane counter—2 frames per
second
—
Auto fast plane counter— 62 frames
per second
Auto fast plane counter— 63 frames
per second
Global Display Indirect Address Register
Global Driver Indirect Address Register
______________________________________________________________________________________
PLANE COUNTER
REGISTER
Global Plane Counter
PLANES/INTENSITY BIT
0 FOR 1 BIT/PIXEL;
1 FOR 1 BIT/PIXEL;
(SEE TABLE 22):
4 PLANES
4 PLANES
plane sequencing continues until the global plane
counter is reconfigured. If the global plane counter is
used for the automatic sequencing of animations, the
user should ensure that the plane ahead of the current
display plane is updated before the automatic plane
switchover to achieve artifact-free animation.
Writing the global clear planes counter (Table 31) allows
any or all display memory planes to be cleared with one
command. The selected plane(s) are cleared on the ris-
ing edge of CS at the end of the 16-bit transmission.
The MAX6960 detects open-circuit and short-circuit
LEDs. It can only detect an LED fault when attempting
to light that LED, so a good strategy to check a panel is
to program the panel with all LEDs on power-up to
check the displays.
The fault and device ID register (Table 32) uses 3 bits
to flag and distinguish open-circuit (open flag), short
circuit (short flag), and overtemperature (OT flag)
faults, and a fourth flag (fault flag), which is an OR of
the open flag, short flag, and OT flag.
The fault and device ID register is cleared on power-
up, and can also be cleared by writing to it. The fault
flags are NOT cleared by a read. When writing the fault
and device ID register, the data written is ignored; all
fault flags are cleared, including the OT flag. It is possi-
ble to clear all MAX6960s on a bus by performing a
global write to the fault and device ID register.
ADDRESS
CODE
(HEX)
0x0B
0x0B
0x0B
0x0B
slow
Fast
D7
1
1
1
1
Global Clear Planes Command
manual
Auto
D6
1
1
1
1
REGISTER DATA
D5
—
0
1
1
LED Fault Detection
Fault Detection
D4
—
0
1
1
Counter setting
D3
—
0
1
1
D2
—
0
1
1
D1
—
1
1
1
D0
—
0
0
1