MCP3909-I/SS Microchip Technology, MCP3909-I/SS Datasheet - Page 31

IC POWER METERING-1 PHASE 24SSOP

MCP3909-I/SS

Manufacturer Part Number
MCP3909-I/SS
Description
IC POWER METERING-1 PHASE 24SSOP
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP3909-I/SS

Package / Case
24-SSOP (0.200", 5.30mm Width)
Input Impedance
390 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.85V
Current - Supply
2.3mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Meter Type
Single Phase
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Supply Voltage Range
4.5V To 5.5V
Digital Ic Case Style
SSOP
No. Of Pins
24
Interface Type
Serial, SPI
Supply Voltage Max
5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP3909EV-MCU16 - EVALUATION BOARD FOR MCP3909MCP3909RD-3PH1 - REF DESIGN MCP3909 3PH ENGY MTR
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP3909-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
6.2
In most energy meter applications, it will be necessary
to have 2
where N is typically 64, 128 or 256. Controlling the
MCLK of the MCP3909 allows you to control the
sample rate and ultimately the data ready (DR) pulses
for coherent waveform sampling. The following
scheme shows how the TIMER and COMPARATOR
modules of the PIC MCU can be used to generate the
clock for the MCP3909 from either a PLL internal
MCLK. For class 0.2 or class 0.1 meter designs that
require harmonic analysis using a PLL is recom-
mended to shift sample rate with line cycle drift, e.g.
line cycle changes from 60 Hz to 59.1 Hz. This is
shown as option 1 in
FIGURE 6-2:
cycle, 3-phase sampling shown with 6 ADCs
© 2006 Microchip Technology Inc.
SDO DR
IRQ
IRQ
50 (or 60 Hz)
Achieving Line Cycle Sampling
with Zero Blind Cycles
N
samples for each 50 or 60 Hz line cycle,
Phase A,B,C I & V Data
Option 1
Phase A || B || C
PLL Circuit
x 32768
Figure
Using the PIC device to control the MCP3909 MCLK to achieve 2
x 6 ADCs
16 bits
6-2.
t
MCP3909
LINE_CYC
t
SAMPLE
1.63 MHz (50)
1.96 MHz (60)
128 samples/line cycle
t
SAMPLE
MCP3909
3.579 MHz
MCLK input
A simpler lower cost option would be to choose a
frequency that would give an integer number of line
cycles for exactly 50 Hz (or 60 Hz). This is possible
using a 39.3216 MHz crystal for the PIC18F device.
Figure 6-2
achieve 128 samples for each line cycle, 1.63 MHz for
a 50 Hz line, or 1.96 MHz for a 60 Hz line. The
MCP3909 clock can operate from 1 MHz to 4 MHz.
Using this approach, the PIC MCU can gather the
waveform data immediately after the data ready pulse,
at up to 10 MHz. The remainder of the time can be used
to calculate the power measurements to achieve true
line cycle sampling with zero blind cycles.
For more information and firmware, see the Microchip’s
web page for demo board information.
shows example clock frequencies to
MCP3909
PIC MCU
CCP2 / 32768
DR Pulse
X1
Option 2
DR
To PIC MCU
MCP3909
N
39.3216 MHz
samples per line
(50 or 60 Hz)
IRQ
DS22025A-page 31

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