CS5462-ISZ Cirrus Logic Inc, CS5462-ISZ Datasheet
CS5462-ISZ
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CS5462-ISZ Summary of contents
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... AGND Preliminary Product Information http://www.cirrus.com Description The CS5462 is a low cost power meter solution combin- ing two ∆Σ Analog-to-Digital Converters (ADC)’s, an energy-to-frequency converter, and energy pulse out- puts on a single chip designed to accurately measure and calculate energy for single phase wire power metering applications with minimal external components ...
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... COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTIO N W ITH THE SE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are tradem arks of Cirrus Logic, Inc. All other b rand and product nam es in this docum ent tradem arks or service ma rks of their resp ective owners .cirrus.com CS5462 ...
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... Programmable Gain Amplifier (PGA) .............................................................................. 12 4.2 Pulse-Rate Output ........................................................................................................... 12 4.2.1 Stepper Motor Format. ........................................................................................ 12 4.2.2 Mechanical Counter Format ................................................................................ 13 4.3 Energy Direction Indicator ............................................................................................... 13 4.4 Internal Calibration Option ............................................................................................... 13 4.5 Power-on Reset ............................................................................................................... 13 4.6 Oscillator Characteristics ................................................................................................. 14 4.7 User Defined Settings ...................................................................................................... 14 4.8 Basic Application Circuit Configurations .......................................................................... 16 5. PACKAGE DIMENSIONS ...................................................................................................... 17 6. REVISIONS ............................................................................................................................ 18 CS5462 3 ...
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... LIST OF FIGURES Figure 1. Data Flow ....................................................................................................................... 11 Figure 2. PGA Settings.................................................................................................................. 12 Figure 3. Pulse Output Settings .................................................................................................... 12 Figure 6. Calibration Options......................................................................................................... 13 Figure 7. Power-on Reset ............................................................................................................. 14 Figure 8. Oscillator Connection ..................................................................................................... 14 Figure 9. Calibration, Frequency Select, and PGA Select ............................................................ 14 Figure 7. Power-on Reset ............................................................................................................. 15 Figure 8. Typical Connection Diagram .......................................................................................... 16 4 CS5462 ...
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... VA+/AGND, both of the CS5462’s input channels accommodate common mode + signal levels between (AGND - 0.25 V) and VA+. The CS5462 has three pulse output pins: E1, E2 and FOUT. E1 and E2 can be used to directly drive a mechanical counter or stepper motor, or inter- face to a micro controller. The FOUT pin conveys ...
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... AGND pin on the converter. VREFIN - The voltage input to this pin establishes the voltage reference for the on-chip modula- tor. IIN+, IIN- - Differential analog input pins for current channel. VD+ - The positive digital supply. DGND - Digital Ground AGND - Analog Ground VA+ - The positive analog supply. CS5462 ...
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... AGND = DGND = 0 V. All voltages with respect • CAL0 and CAL1 are connected to P4 unless other- ° wise noted. A Symbol (Gain = 10 (Gain = 50) (All Gain Ranges (All Gain Ranges)(Note {(V +)-(V -)} (Note VOS (Note 1) FSE CS5462 Min Typ Max - - 500 - - 100 - 500 - 0 . ...
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... Hz) is imposed onto the +5 V supply voltage at VA+ and VD+ pins. The “+” and “-” input pins of both input channels are shorted to VA-. Then the CS5462 is put into an internal test mode and digital output data is collected for the channel under test. The zero-peak value of the digital sinusoidal output signal is determined, and this value is converted into the zero-peak value of the sinusoidal voltage that would need to be applied at the channel’ ...
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... Any Digital Output Any Digital Input t Any Digital Output XTAL = 4.096 MHz (Note 9) t ost Min Typ Max (VD 0 0 0.2 VD+ (VD 0.4 - ±1 ± Min Typ Max 3 4.096 1 1.0 fall - CS5462 Unit µ Unit MHz % % µs ns µ ...
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... Total power dissipation, including all input currents and output currents. 10 Symbol (Notes 10, 10 and 12) Positive Digital VD+ Positive Analog VA+ (Notes 13, 14, 15 (Note 16 All Analog Pins V INA All Digital Pins V IND stg ≤ + 6.0 V. ≤ + 6.0 V. CS5462 Min Typ Max Unit -0.3 - +6.0 V -0 ± 500 mW - 0.3 - (VA+) + 0.3 V -0.3 - (VD+) + 0.3 ...
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... Figure 1. Data Flow erage power. This power is then adjusted based on the internal calibration setting defined at startup. Calibrating the CS5462 is done by externally con- necting the configuration input pins, CAL1 and CAL0, to the program select output pins P7 particular sequence. These connections will in- ternally compensate for small gain errors ...
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... P-P Figure 2. PGA Settings ent options allow the CS5462’s PGA to be set up in either 10x or 50x mode and enable or disable the high pass filters in either of the voltage or the cur- rent channels. During Startup the CS5462 will scan the IGAIN in- ...
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... Although this method is available, it may be costly to add the additional components and the accuracy required is often difficult to achieve alterna- tive the CS5462 is designed to allow the user to calibrate the part without the need for external po- tentiometers or resistor networks. The CS5462 provides a digital on-chip calibration solution. This digital alternative can calibrate energy registration error to within 0 ...
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... P6 P7 Figure 9. Calibration, Frequency Select, and By directly connecting FREQ with P4 and IGAIN with P5 the CS5462 is configured to drive a step- per motor with a maximum pulse output rate of 2 Hz, to support an input range of 50 0mV to remove all DC content on the current signals by enabling the HPFs on the Ich. The CS5462 is now ready for calibration ...
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... After these connections are made the av- erage pulse output frequency of FOUT, E1, and E2 will have a gain error less than or equal to -0.04% of full scale. CS5462 +3.6% +2.2% +0 ...
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... In this type of shunt-resistor configuration, the common-mode level of the CS5462 must be referenced to the hot side of the power line. This means that the common-mode po- tential of the CS5462 will typically oscillate to very high voltage levels, as well as very low voltage lev- els, with respect to earth ground potential. 500 Ω ...
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... JEDEC #: MO-150 Controlling Dimension is Millimeters. CS5462 1 E1 ∝ END VIEW L MILLIMETERS NOM MAX -- 2.13 0.13 0.25 1.73 1.88 -- 0.38 8.20 8.50 7.80 8.20 5 ...
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... ING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document trademarks or service marks of their respective owners. 18 CS5462 Changes ...