LT1641-1IS8#PBF Linear Technology, LT1641-1IS8#PBF Datasheet - Page 7
![IC CONTRLR HOTSWAP POSVOLT 8SOIC](/photos/7/35/73593/lt1641-1is8_pbf_sml.jpg)
LT1641-1IS8#PBF
Manufacturer Part Number
LT1641-1IS8#PBF
Description
IC CONTRLR HOTSWAP POSVOLT 8SOIC
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheet
1.LT1641-1IS8.pdf
(12 pages)
Specifications of LT1641-1IS8#PBF
Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
9 V ~ 80 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
TI I G DIAGRA S
APPLICATIO S I FOR ATIO
Hot Circuit Insertion
When circuit boards are inserted into a live backplane, the
supply bypass capacitors on the boards draw high peak
currents from the backplane power bus as they charge up.
The transient currents can permanently damage the con-
nector pins and glitch the system supply, causing other
boards in the system to reset.
The chip is designed to turn on a board’s supply voltage in
a controlled manner, allowing the board to be safely
inserted or removed from a live backplane. The chip also
provides undervoltage and overcurrent protection while a
power good output signal indicates when the output
supply voltage is ready.
Power-Up Sequence
The power supply on a board is controlled by placing an
external N-channel pass transistor (Q1) in the power path
(Figure 5). Resistor R
capacitor C1 provides control of the GATE slew rate.
W U
GATE
ON
1.313V
Figure 2. ON to GATE Timing
5V
U
t
PLHON
S
provides current detection and
U
W
V
CC
W
– SENSE
GATE
1.233V
Figure 4. SENSE to GATE Timing
1V
U
t
PHLON
1641-1
47mV
F02
V
CC
t
PHLSENSE
Resistor R6 provides current control loop compensation
while R5 prevents high frequency oscillations in Q1.
Resistors R1 and R2 provide undervoltage sensing.
After the power pins first make contact, transistor Q1 is
turned off. If the voltage at the ON pin exceeds the turn-on
threshold voltage, the voltage on the V
undervoltage lockout threshold, and the voltage on the
TIMER pin is less than 1.233V, transistor Q1 will be turned
on (Figure 6). The voltage at the GATE pin rises with a slope
equal to 10µA/C1 and the supply inrush current is set at
I
sense resistor R
be limited by the internal current limit circuitry which
adjusts the voltage on the GATE pin to maintain a constant
voltage across the sense resistor.
Once the voltage at the output has reached its final value,
as sensed by resistors R3 and R4, the PWRGD pin goes
high.
INRUSH
PWRGD
FB
= C
L
• 10µA/C1. If the voltage across the current
Figure 3. FB to PWRGD Timing
S
1.313V
gets too high, the inrush current will then
LT1641-1/LT1641-2
1V
1641-1
t
PLHFB
F04
CC
1.233V
pin exceeds the
1V
t
PHLFB
1641-1
F03
164112fc
7