LT1640LIS8 Linear Technology, LT1640LIS8 Datasheet - Page 13
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LT1640LIS8
Manufacturer Part Number
LT1640LIS8
Description
IC CONTRLR HOTSWAP NEGVOLT 8SOIC
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheet
1.LT1640LCS8PBF.pdf
(16 pages)
Specifications of LT1640LIS8
Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
-10 V ~ -80 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Family Name
LT1640L
Package Type
SOIC N
Operating Supply Voltage (min)
-10V
Operating Supply Voltage (max)
-80V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
3.99mm
Product Height (mm)
1.5mm
Product Length (mm)
5mm
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LT1640LIS8
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT1640LIS8#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Company:
Part Number:
LT1640LIS8#TR
Manufacturer:
LT
Quantity:
7
Company:
Part Number:
LT1640LIS8#TRPBF
Manufacturer:
LINEAR
Quantity:
13 239
Part Number:
LT1640LIS8#TRPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
APPLICATIONS
When the DRAIN voltage of the LT1640L is high with
respect to V
and the PWRGD pin is in a high impedance state (Fig-
ure 12). The PWRGD pin will be pulled high by the module’s
internal pull-up current source, turning the module off.
When the DRAIN voltage drops below V
and the PWRGD pin will pull low, enabling the module.
The PWRGD signal can also be used to turn on an LED or
optoisolator to indicate that the power is good as shown
in Figure 13.
EE
, the internal pull-down transistor Q2 is off
* DIODES INC. SMAT70A
– 48V
GND
U
*
GND
9.09k
562k
10k
INFORMATION
1%
1%
1%
R4
R5
R6
* DIODES INC. SMAT70A
(SHORT PIN)
– 48V
U
GND
*
GND
3
2
R4
R5
R6
(SHORT PIN)
UV
OV
3
V
EE
W
4
1
3
2
Figure 13. Using PWRGD to Drive an Optoisolator
0.02
5%
R1
PG
LT1640L
UV
OV
3
, Q2 will turn on
+
–
SENSE
2
V
Figure 12. Active Low Enable Module
4
1
EE
V
4
5
PG
R1
U
SENSE
2
C1
150nF
25V
+
–
LT1640L
4
5
GATE
V
DD
IRF530
8
6
Q1
GATE
V
C1
DD
R2
10
5%
6
8
Q1
R2
18k
Gate Pin Voltage Regulation
When the supply voltage to the chip is more than 15.5V,
the GATE pin voltage is regulated at 13.5V above V
supply voltage is less than 15.5V, the GATE voltage will be
about 2V below the supply voltage. At the minimum 10V
supply voltage, the gate voltage is guaranteed to be greater
than 6V. The gate voltage will be no greater than 18V for
supply voltages up to 80V.
5%
R3
PWRGD
DRAIN
R3
V
EE
Q2
3.3nF
100V
C2
PWRGD
C2
DRAIN
1
7
1N4148
7
1N4148
+
1
1640 F12
C3
MOC207
R7
51k
5%
ENABLE MODULE
V
ON/OFF
V
ACTIVE LOW
IN
IN
+
–
V
V
OUT
OUT
LT1640L/LT1640H
+
–
+
C3
100 F
100V
1640 F13
PWRGD
EE
13
. If the
1640lhfb