LTC4350CGN Linear Technology, LTC4350CGN Datasheet - Page 6

• Manufacturer Part Number: LTC4350CGN
• Description: IC CNTRLR HOTSWAP LOADSHAR16SSOP
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LTC4350CGN

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: 17V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

pin FuncTions
LTC4350
GND (Pin 8): Chip Ground.
FB (Pin 9): Analog Error Amplifier Input (E/A1). This pin is
used to monitor the output supply voltage with an external
resistive divider. The FB pin voltage is compared to 1.220V
reference. The difference between the FB pin voltage and
the reference is amplified and output on the COMP1 pin.
R
converts the voltage at the COMP2 pin (down a diode
voltage) to the R
the external resistor (R
and ground is (COMP2 – V
used to adjust the output voltage.
I
the I
pin that was set by the external resistor R
is used to adjust the output supply voltage by modifying
the voltage sensed by the power supply’s internal voltage
feedback circuitry.
R
in the supply path between the R
supply current is measured as a voltage drop between R
and R
multiplied at the GAIN pin.
R
in the supply path between the R
supply current is measured as a voltage drop between R
and R
multiplied at the GAIN pin.

OUT
SET
–
+
(Pin 12): Analog Input Pin. With a sense resistor placed
(Pin 13): Analog Input Pin. With a sense resistor placed
OUT
(Pin 11): Analog Output Pin. The current flowing into
–
–
(Pin 10): Analog Output Pin. The I
. This voltage is measured by the I
. This voltage is measured by the I
pin is equal to the current flowing out of the R
SET
pin. Therefore, the current through
SET
) placed between the R
DIODE
+
+
)/R
and R
and R
SET
–
–
. This current is
SET
SENSE
SENSE
pins, the power
pins, the power
OUT
. This current
block and
block and
amplifier
SET
pin
SET
+
+
GATE (Pin14): The high side gate drive for the external
N-Channel power FET. An internal charge pump provides
the gate drive necessary to drive the FETs. The slope of
the voltage rise or fall at the GATE is set by an external
capacitor connected between GATE and GND, and the
10µA charge pump output current. When the undervoltage
lockout circuit monitoring V
high or the UV pin is pulled low, the GATE pin is immedi-
ately pulled to GND.
STATUS (Pin 15): Open-Drain Digital Output. The STATUS
pin has an open-drain output to GND. This pin is pulled
low to indicate a fault has occurred in the system. There
are three types of faults. The first is a undervoltage lockout
on V
active. The second is when the COMP2 pin is above 1.5V
or below 0.5V and the voltage on the GAIN pin is greater
than 100mV. The final failure is when the OV pin is high.
The three faults will activate the pull-down on the STATUS
pin after a timing cycle.
V
3.3V to 12V for Normal Operation. I
An undervoltage lockout circuit disables the chip until
the voltage at V
capacitor is required on the V
to the same power supply output that is being adjusted,
then a 51Ω decoupling resistor is needed to hold up the
supply during a short to ground on the supply output.
V
connected to the R
CC
CC
must be greater than or equal to the supply that is
(Pin 16): The Positive Supply Input, Ranging from
CC
or the UV pin is low while the output voltage is
CC
is greater than 2.47V. A 0.1µF bypass
+
and R
–
CC
pins.
CC
trips, the OV pin is pulled
pin. If the V
CC
is typically 1.6mA.
CC
pin is tied
4350fb