LTC1421CSW#TRPBF Linear Technology, LTC1421CSW#TRPBF Datasheet - Page 15
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LTC1421CSW#TRPBF
Manufacturer Part Number
LTC1421CSW#TRPBF
Description
IC CONTROLLER HOT SWAP 24-SOIC
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheet
1.LTC1421CG-2.5PBF.pdf
(24 pages)
Specifications of LTC1421CSW#TRPBF
Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
3 V ~ 12 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS
time point 2). Pulses less than 20ms on POR are ignored.
CPON goes low. Both GATEHI and GATELO will be
actively pulled down to GND. When V
its reset threshold voltage, PWRGD will immediately pull
low (time point 3) followed by RESET and DISABLE 32 s
later (time point 4). Both supplies will be discharged to
ground and stay there until POR is pulled high.
The circuit breaker can be reset by pulling POR low. After
POR is low for more than 20ms, the chip will immediately
try to power up the supplies once the outputs are below the
V
Circuit Breaker Timing
The waveforms for the circuit when a short occurs on
either supply during board insertion are shown in
TRIP
point.
U
DISABLE
GATELO
PWRGD
GATEHI
V
V
RESET
FAULT
V
OUTLO
CPON
V
CON1
CON2
OUTHI
INFORMATION
CCLO
POR
CCHI
U
1
W
2
OUTLO
3
Figure 16. Circuit Breaker Timing
drops below
20ms
U
4
5
Figure 16. Time points 1 to 4 are the same as the board
insertion example, but at time point 5, a short circuit is
detected on one of the supplies. The charge pumps are
immediately turned off, the outputs V
actively pulled to GND and the CPON and FAULT pins are
pulled low. At time point 6, the circuit breaker is reset by
pulling POR low. After POR has been low for 20ms (time
point 7), CPON and FAULT are pulled high, the 20 A
reference current is connected to RAMP and the charge
pumps are enabled. V
controlled rate. When V
threshold, the PWRGD signal is pulled high (time point 8).
After a 200ms delay, RESET is pulled high and DISABLE
goes low.
6
20ms
7
8
LTC1421/LTC1421-2.5
V
200ms
TH1
OUTHI
9
OUTLO
and V
1421 F16
has exceeded its reset
OUTLO
OUTHI
and V
ramp up at a
OUTLO
15
are