SI3400-D-GM Silicon Laboratories Inc, SI3400-D-GM Datasheet - Page 18
![IC POWER OVER ETHERNET 20QFN](/photos/16/9/160938/si3400_sml.jpg)
SI3400-D-GM
Manufacturer Part Number
SI3400-D-GM
Description
IC POWER OVER ETHERNET 20QFN
Manufacturer
Silicon Laboratories Inc
Type
Power over Ethernet Switch (PoE)r
Datasheet
1.SI3400-E1-GM.pdf
(20 pages)
Specifications of SI3400-D-GM
Applications
IP Phones, Power over LAN, Network Routers and Switches
Internal Switch(s)
Yes
Current Limit
525mA
Voltage - Supply
2.8 V ~ 57 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-QFN
Mounting Style
SMD/SMT
For Use With
336-1326 - KIT REF DESIGN PWR OVER ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1322
Si3400/Si3401
D
Revision 0.3 to Revision 0.4
Revision 0.4 to Revision 0.5
Revision 0.5 to Revision 0.6
Revision 0.6 to Revision 0.7
18
OCUMENT
Updated Figure 2 on page 9.
Added Table 6, “Package Thermal Characteristics,”
on page 7.
Updated Figure 3 on page 10.
Updated Table 4 on page 6.
Added “pad” notes to VNEG pin under Description
section in Table 11 on page 15.
Updated Table 7, “Component Listing—Class 0 with
5 V Output,” on page 8 and Table 8, “Components—
Class 1 with Isolated 5.0 V Output,” on page 9.
Updated Table 4 on page 6.
Updated Table 8 on page 9 and Table 10 on
page 12.
Updated “5. Package Outline” and Table 12,
“Package Dimensions,” on page 16.
Added Si3401.
Updated Figure 1 on page 8.
Updated Table 7 on page 8.
Updated "6. Ordering Guide" on page 17.
Added VSSA pin throughout document for product
revisions beginning with Rev D.
Updated Table 2 specs (for ESD).
Updated Table 4 specs (for current limits).
Updated Table 5 specs (for power dissipation).
Updated Figure 1 and Table 7.
Updated Figure 2 and Table 8.
Updated Figure 4 and Table 11.
connects to VDD.
R9 now correctly connected to VNEG; RIMAX now
Updated switcher frequency specification to 350 kHz.
Updated recommended BOMs.
Updated test condition for VDD current.
Updated minimum value of switcher FET on resistance.
Updated Rclass information.
Replaced package drawing and dimensions table.
C
HANGE
L
IST
Rev. 0.9
Revision 0.7 to Revision 0.8
Revision 0.8 to Revision 0.9
ISOSSFT (pin 4) added throughout document.
Updated Figures 1 and 2 for addition of ISOSSFT
pin. Function available on Revision E and higher.
Updated throughout document to support Revision
E.
Added Regulated Output Voltage Tolerance
specification to Table 4, for non-isolated applications
only.
Updated Figure 1, Figure 2, and Table 7 for Rev. E
BOM changes.
Nominal class resistor values updated for Rev. E in
Table 10.