LTC3220EPF#PBF Linear Technology, LTC3220EPF#PBF Datasheet - Page 10

• Manufacturer Part Number: LTC3220EPF#PBF
• Description: IC LED DRVR QVGA DISPLAY 28UTQFN
• Manufacturer: Linear Technology
• Type: QVGA Display (I²C Interface)r

Specifications of LTC3220EPF#PBF

• Topology: Open Drain, Step-Up (Boost), Switched Capacitor (Charge Pump)
• Number Of Outputs: 18
• Internal Driver: Yes
• Type - Primary: Backlight
• Type - Secondary: LED Blinker
• Frequency: 850kHz ~ 1.05MHz
• Voltage - Supply: 2.9 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 28-UTQFN
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 20mA
• Internal Switch(s): Yes
• Efficiency: 91%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

OPERATION
LTC3220/LTC3220-1
Blinking
Each universal output (ULED1 to ULED18) can be set to
blink with an on time of 0.156 seconds, or 0.625 seconds
and a period of 1.25 seconds, or 2.5 seconds via the I
port. The blinking rate is selected via REG19 and ULED
outputs are selected via REG1 to REG18. Blinking and
gradation rates are independent. Please refer to Applica-
tion Note 115 for detailed information and examples on
programming blinking.
Gradation
Universal LED outputs ULED1 to ULED18 can be set to
have the current ramp up and down at 0.24 seconds, 0.48
seconds and 0.96 seconds rates via the I
these outputs can have either blinking or gradation enabled.
The gradation time is set via REG19 and ULED outputs
are selected via REG1 to REG18. The ramp direction is
also controlled via REG19. Setting the up bit high causes
gradation to ramp up, setting this bit to a low causes
gradation to ramp down. Please refer to Application Note
115 for detailed information and examples on program-
ming gradation.
When gradation is disabled the LED output current remains
at the programmed value.
The charge pump mode is reset to 1x mode after gradation
completes ramping down.
Chip Reset (RST)
The RST pin is used to turn off the chip, including the charge
pump and all ULED outputs, and clear all registers in the
10
2
C port. Each of
2
C
LTC3220/LTC3220-1. When RST is low, the part is in shut-
down and cannot be programmed through the I
Shutdown Current
Shutdown occurs when all the current source data bits
have been written to zero, when the shutdown bit in REG0
is written with a logic 1, when RST is pulled low, or when
DV
Although the LTC3220/LTC3220-1 are designed to have
very low shutdown current, they will draw about 3μA
from V
the LTC3220/LTC3220-1 are in shutdown when DV
low. Note, however that all of the logic signals that are
referenced to DV
at DV
absolute maximum specifi cations on these pins.
EMI Reduction
The fl ying capacitor pins C1M, C1P , C2M and C2P have
controlled slew rates to reduce conducted and radiated
noise.
Serial Port
The microcontroller compatible I
all of the command and control inputs for the LTC3220/
LTC3220-1. Data on the SDA input is loaded on the rising
edge of SCL. D7 is loaded fi rst and D0 last. There are
20 data registers, one address register and one sub-ad-
dress register. Once all address bits have been clocked
into the address register, an acknowledge occurs. The
CC
CC
is set below the undervoltage lockout voltage.
IN
or below (i.e., ground) to avoid violation of the
when in shutdown. Internal logic ensures that
CC
(SCL, SDA and RST) will need to be
2
C serial port provides
2
C port.
CC
32201fc
is