LM3431AQMH/NOPB National Semiconductor, LM3431AQMH/NOPB Datasheet - Page 17
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LM3431AQMH/NOPB
Manufacturer Part Number
LM3431AQMH/NOPB
Description
IC LED DRVR HP CONS CURR 28TSSOP
Manufacturer
National Semiconductor
Series
PowerWise®r
Type
High Power, Constant Currentr
Datasheet
1.LM3431MHNOPB.pdf
(24 pages)
Specifications of LM3431AQMH/NOPB
Constant Current
Yes
Topology
PWM, Step-Up (Boost)
Number Of Outputs
3
Internal Driver
No
Type - Primary
Automotive
Type - Secondary
High Brightness LED (HBLED)
Frequency
651kHz ~ 1.1MHz
Voltage - Supply
4.5 V ~ 36 V
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Operating Temperature
-40°C ~ 125°C
Current - Output / Channel
200mA
Internal Switch(s)
Yes
Efficiency
88%
Led Driver Application
Display Backlighting, Automotive Lighting
No. Of Outputs
3
Output Current
200mA
Output Voltage
40V
Input Voltage
5V To 37V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Other names
LM3431AQMH
NDRV
The NDRV pins drive the base of the external NPN or N-
channel MOSFET current regulators. Each pin is capable of
driving up to 15 mA of base current typically. Therefore, NPN
devices with sufficient gain must be selected. The required
NDRV current can be calculated from the following equation,
where β is the NPN transistor gain.
If NFETs are used, the NDRV current can be ignored. NPN
transistors should be selected based on speed and power
handling capability. A fast NPN with short rise time will give
the best dimming response. However, if the rise time is too
fast, some ringing may occur in the LED current. This ringing
can be improved with a resistor in series with the NDRV pins.
The NPNs must be able to handle a power equal to I
voltage. Note that the NPN voltage can be as high as approx-
imately 5.5V in a fault condition. The NDRV pins have a
limited slew rate capability which can increase the turn-on
delay time when driving NFETs. This delay increases the
minimum dimming on-time and can affect the dimming lin-
earity at high dimming frequencies. Low V
are recommended to ensure that they will turn fully on within
the required time. At dimming frequencies above 10 kHz,
NPN transistors are recommended for the best performance.
CFB AND SC DIODES
The bottom of each LED string is connected to the CFB and
SC pins through diodes as shown in Figure 1. The CFB pin
receives voltage feedback from the lowest cathode voltage.
The other string cathode voltages will vary above the regu-
lated CFB voltage. The actual cathode voltage on these
strings will depend on the LED forward voltages. This ensures
that the lowest cathode voltage (highest Vf) will be regulated
with enough headroom for the NPN regulator. The SC pin
monitors for LED fault conditions and limits the maximum
cathode voltage (See LED Protection section). In this way,
each LED string’s cathode is maintained within a window be-
tween minimum headroom and fault condition.
Both the CFB and SC diodes must be rated to at least 100
µA, and the CFB diode should have a reverse voltage rating
higher than V
to use the smallest possible case size in order to minimize
diode capacitance which can slow the LED current rise and
fall times.
DIMMING
The LM3431 is compatible with both analog and digital LED
dimming signals. The MODE/F pin is used to select analog or
digital mode. When MODE/F is pulled above 3.8V, digital
mode is enabled and a PWM signal up to 25 kHz can be ap-
plied to the DIM pin. In this mode, the LED current regulators
will be active when DIM is above 2V (typical) and inactive
when DIM is pulled below 1.1V (typical). Although any pulse
width may be used at the DIM pin, 0.4 µs is the minimum LED
on time (in either digital or analog mode). This limits the min-
imum dimming duty cycle at high dimming frequencies. For
example, at 20 kHz, the dimming duty cycle is limited to 0.8%
minimum. At lower dimming frequencies, the dimming duty
cycle can be much lower and the minimum depends on the
application conditions including the FF setting (see Setting FF
section). In analog dimming mode, the MODE/F pin is used
to set the PWM dimming frequency, and duty cycle is con-
trolled by varying the analog voltage level at the DIM pin. To
OUT
. With these requirements in mind, it is best
GS
threshold NFETs
LED
x NPN
17
operate in analog mode, connect a capacitor from MODE/F
to ground, shown as C5 in the typical application (without the
pull-up resistor installed). The dimming frequency is set ac-
cording to the following equation:
In analog mode, the MODE/F pin will generate a triangle wave
with a peak of 2.5V and minimum of 0.37V. The DIM pin volt-
age is compared to the MODE/F voltage to create an internal
PWM dimming signal whose duty cycle is proportional to the
DIM voltage. When the DIM voltage is above 2.5V, the duty
cycle is 100%. Duty cycle will vary linearly with DIM voltage
as shown in Figure 8. Typical analog dimming waveforms are
shown below in Figure 9.
In PWM dimming, the average LED current is equal to the set
LED current (I
average LED current tracks the dimming ratio with exception-
al linearity. However, the accuracy of average LED current
depends somewhat on the rise and fall times of the external
current regulators. This becomes more apparent with short
FIGURE 8. Analog Mode Dimming Duty Cycle vs. DIM
FIGURE 9. Analog Dimming Mode Waveforms
LED
) multiplied by the dimming duty cycle. The
voltage
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