LM3500TLX-21/NOPB National Semiconductor, LM3500TLX-21/NOPB Datasheet - Page 5

• Manufacturer Part Number: LM3500TLX-21/NOPB
• Description: IC LED DRVR WHT BCKLT 8-USMD
• Manufacturer: National Semiconductor
• Type: Backlight, White LEDr

Specifications of LM3500TLX-21/NOPB

• Topology: PWM, Step-Up (Boost)
• Number Of Outputs: 1
• Internal Driver: Yes
• Type - Primary: Backlight
• Type - Secondary: White LED
• Frequency: 850kHz ~ 1.15MHz
• Voltage - Supply: 2.7 V ~ 7 V
• Voltage - Output: 19.5 V ~ 20.5 V
• Mounting Type: Surface Mount
• Package / Case: 8-MicroSMD
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 640mA
• Internal Switch(s): Yes
• Efficiency: 85%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM3500TLX-21

I
I
SHDN
Threshold
Vout
VL
Symbol
Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended
to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: This condition applies if V
Note 3: For more detailed soldering information and specifications, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level Chip
Scale Package (AN-1112), available at www.national.com.
Note 4: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
dissipation of the device in the application (P
following equation: T
Note 6: Junction-to-ambient thermal resistance (θ
test board conforming to JEDEC standards. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues
when designing the board layout.
Note 7: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production
tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical
Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 8: Typical numbers are at 25°C and represent the most likely norm.
Note 9: Feedback current flows out of the pin.
Note 10: Current flows into the pin.
Typical Performance Characteristics
V
(LM3500-16)
V
(LM3500-21)
PMOS Switch Leakage
Current (LM3500-16)
PMOS Switch Leakage
Current (LM3500-21)
SHDN Low
SHDN High
Switching Quiescent Current vs V
OUT
OUT
A-MAX
Bias Current
Bias Current
= T
Parameter
J-MAX-OP
IN
< V
– (θ
OUT
JA
A-MAX
. If V
× P
D-MAX
IN
D-MAX
) is dependent on the maximum operating junction temperature (T
> V
), and the junction-to ambient thermal resistance of the part/package in the application (θ
JA
) is highly application and board-layout dependent. The 75ºC/W figure provided was measured on a 4-layer
).
OUT
V
V
V
V
OUT
OUT
OUT
OUT
, a voltage greater than V
20065755
= 15V, SHDN = V
= 20V, SHDN = V
= 15V, V
= 20V, V
IN
Conditions
SW
SW
= 0V
= 0V
5
IN
IN
IN
+ 0.3V should not be applied to the V
Non-Switching Quiescent Current vs V
(Note 7)
Min
1.1
(Note 8)
J-MAX-OP
0.01
0.01
0.65
0.65
Typ
260
300
OUT
= 125ºC), the maximum power
or V
SW
(Note 7)
pins.
Max
400
460
0.3
3
3
JA
20065756
), as given by the
IN
www.national.com
Units
µA
µA
V