IR21593SPBF International Rectifier, IR21593SPBF Datasheet - Page 19

• Manufacturer Part Number: IR21593SPBF
• Description: IC BALLAST CONTROL DIM 16-SOIC
• Manufacturer: International Rectifier
• Type: Ballast Controllerr

Specifications of IR21593SPBF

• Frequency: 30 ~ 230 kHz
• Current - Supply: 10mA
• Voltage - Supply: 12.5 V ~ 15.6 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Lead Free Status / Rohs Status: RoHS Compliant part

DIM during dimming to increase high-frequency
noise immunity and minimize component count.
Dimming (DIM)
To regulate lamp power, the error between the
reference phase and the phase of the output stage
current forces the VCO to steer the frequency in
the proper direction, as determined by the transfer
function of the output stage, such that the error is
forced to zero. An internal 15uA current source is
connected to pin VCO during dimming mode
(Figure 12) to discharge the VCO capacitor and
decrease the frequency towards lock.
Once lock is achieved, the phase detector (PDET)
outputs short pulses to an open-drain PMOS that
charges the VCO capacitor through an internal
resistor (RFB) each time an error pulse occurs
(Figure 13). This action "nudges" the integrator at
the input of the VCO to keep the phase of the
output stage current exactly locked in phase with
the reference.
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0.5 to 5V
V
V
BUS
BUS
(+)
(-)
Figure 12, IR21592/IR21593 dimming circuitry.
C
C
R
R
R
VCO
CPH
MAX
DIM
MIN
CPH
VCO
MAX
DIM
MIN
2
3
4
5
6
16uA
R
7.6V
FB
VCC
CONTROL
PHASE
INTERFACE
VCO
DIM
FAULT
LOGIC
Half
Bridge
Driver
IR2159
1.6V
16
15
11
10
12
HO
CS
COM
VS
LO
Q2
Q2
RCS
Load
Return
Half
Bridge
Output
I
LOAD
IR21592/IR21593
The IR21592/IR21593 includes a dimming
interface for analog lamp power control. The
DIM pin input requires a voltage in the range of
0.5 to 5VDC, with 5V corresponding to minimum
phase shift (maximum lamp power). The output
of the dim interface is the voltage on pin MIN,
which is compared with the internal timing
capacitor (CT) voltage to produce a frequency-
independent digital reference phase (Figure 14).
V
V
REF
VCO
LO
FB
ERR
CS
Figure 13, Phase control timing diagram.
( S ) & ( PbF )
t
t
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