IR2159 International Rectifier, IR2159 Datasheet - Page 20

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IR2159

Manufacturer Part Number
IR2159
Description
IC BALLAST CONTROL DIM 16-DIP
Manufacturer
International Rectifier
Type
Ballast Controllerr
Datasheet

Specifications of IR2159

Frequency
25 ~ 95 kHz
Current - Supply
10mA
Voltage - Supply
12.5 V ~ 15.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output
-

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IR2159/IR21591
The IR2159 includes a dimming interface for
analog lamp power control. The DIM pin input
requires a voltage in the range of 0.5 to 5VDC,
with 5V corresponding to minimum phase shift
(maximum lamp power). The output of the dim
interface is the voltage on pin MIN, which is
compared with the internal timing capacitor (CT)
voltage to produce a frequency-independent digital
reference phase (Figure 13).
Once lock is achieved, the phase detector (PDET)
outputs short pulses to an open-drain PMOS that
charges the VCO capacitor through an internal
resistor (RFB) each time an error pulse occurs
(Figure 12). This action "nudges" the integrator at
the input of the VCO to keep the phase of the
output stage current exactly locked in phase with
the reference.
20
n
n
n
V
V
REF
VCO
LO
FB
ERR
CS
Figure 12, Phase control timing diagram.
( S )
t
t
The charging time of CT from 1V to 5.1V
determines the on-time of output gate drivers HO
and LO and corresponds to -180 degrees of
possible phase shift in load current (minus
deadtime). For the 0 to -90 degree dim range, the
voltage on pin MIN is bounded between 1V and
3V using pins MIN and MAX. An external resistor
on pin MAX programs the minimum phase shift
reference (maximum lamp power) corresponding
to 5V on pin DIM, and an external resistor on pin
MIN sets the maximum phase shift (minimum
lamp power) corresponding to 0.5V on pin DIM.
Current Sensing
During dimming, the current sensing circuitry
(Figure 14) detects over-current which can occur
during hard-switching (see Fault section), and
zero-crossing to measure the phase of the total
load current. To reject any switching noise which
can occur at the turn-on of the low-side MOSFET
or IGBT, a digital current sense blanking circuit
blanks out the signal from the zero-crossing
V
5 V
3 V
1 V
MIN
0
0.5V
R
MIN
Figure 13, Dimming interface
V
DIM
R
M A X
SETTING
U S E R
n
5 V
REF
L O
V
0
C T
-
-90
www.irf.com
-
DIM
R A N G E
-180
-
n

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