MCP14700-E/MF Microchip Technology, MCP14700-E/MF Datasheet - Page 11

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MCP14700-E/MF

Manufacturer Part Number
MCP14700-E/MF
Description
IC MOSFET DRIVER HIGH/LOW 8DFN
Manufacturer
Microchip Technology
Type
High and Low Side Gate Driverr
Datasheet

Specifications of MCP14700-E/MF

Package / Case
8-DFN
Configuration
High and Low Side, Synchronous
Input Type
Non-Inverting
Delay Time
27ns
Current - Peak
2A
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
36V
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
MOSFET Gate Drivers
Rise Time
10 ns
Fall Time
10 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Supply Current
80 uA
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Maximum Turn-off Delay Time
36 ns
Maximum Turn-on Delay Time
36 ns
Minimum Operating Temperature
- 40 C
Number Of Drivers
Single
Output Current
2000 mA
Output Voltage
0.025 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP14700-E/MF
Manufacturer:
MICROCHIP
Quantity:
1 200
4.0
4.1
The MCP14700 is a synchronous MOSFET driver with
dual independent PWM inputs capable of controlling
both a ground referenced and floating N-Channel
MOSFET. The PWM input threshold levels are truly
3.0V logic tolerant and have 400 mV of typical
hystereses making the MCP14700 ideal for use with
low voltage controllers.
The MCP14700 is capable of suppling 2A (typical)
peak current to the floating high-side MOSFET that is
connected to the HIGHDR. With the exception of a
capacitor, all of the circuitry needed to drive this
high-side N-channel MOSFET is internal to the
MCP14700. A blocking device is placed between the
V
to be charged to V
MOSFET is conducting. Refer to the application
section, Section 5.1 “Bootstrap Capacitor Select”,
for information on determining the proper size of the
bootstrap capacitor. The HIGHDR is also capable of
sinking 2A (typical) peak current.
The LOWDR is capable of sourcing 2A (typical) peak
current and sinking 3.5A (typical) peak current. This
helps ensure that the low-side MOSFET stays turned
off during the high dv/dt of the PHASE node.
4.2
A logic high on either PWM pin causes the
corresponding output drive signal to be high. See
Figure 4-1
representation of the MCP14700 operation. Internally
the PWM pins are pulled to ground to ensure there is
no drive signal to the external MOSFETs if the pins are
left floating. For reliable operation, it is recommended
that the rising and falling slew rate of the PWM signal
be faster than 1V/50 ns.
FIGURE 4-1:
© 2009 Microchip Technology Inc.
CC
LOWDR
PWM
and BOOT pins that allows the bootstrap capacitor
LO
DETAILED DESCRIPTION
Device Overview
PWM Inputs
and
Figure 4-2
t
PDHL
CC
MCP14700 LOWDR Timing Diagram.
t
RL
when the low-side power
for
t
a
PDLL
graphical
t
FL
When designing with the MCP14700 in applications
where cross conduction of the external MOSFETs is
not desired, care must be taken to ensure the PWM
inputs have the proper timing. There is no internal
cross conduction protection in the MCP14700.
4.3
The UVLO feature of the MCP14700 does not allow the
HIGHDR or LOWDR output to function when the input
voltage, V
of the state of the PWM
Once V
and LOWDR outputs will respond to the state of the
PWM
on the UVLO threshold.
4.4
The MCP14700 is protected from an overtemperature
condition by an internal thermal shutdown feature.
When the internal temperature of the MCP14700
reaches 147°C typically, the HIGHDR and LOWDR
outputs will transition to a low state regardless of the
state of the PWM
temperature is reduced by 20°C typically, the
MCP14700 will automatically respond to the states of
the PWM
4.5
The PWM signal applied to the MCP14700 is supplied
by a controller IC. The timing diagram in
graphically depicts the PWM signal and the output
signals of the MCP14700.
HI
CC
or PWM
Under Voltage Lockout (UVLO)
Overtemperature Protection
Timing Diagram
HI
CC
reaches the UVLO threshold, the HIGHDR
and PWM
, is below the UVLO threshold regardless
LO
HI
pins. There is a 500 mV hystereses
or PWM
LO
HI
pins.
and PWM
MCP14700
LO
pins. Once the internal
LO
DS22201A-page 11
pins.
Figure 4-1

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