IRS2118PBF International Rectifier, IRS2118PBF Datasheet - Page 12

• Manufacturer Part Number: IRS2118PBF
• Description: IC DRIVER MOSFET/IGBT 1CH 8-DIP
• Manufacturer: International Rectifier

Specifications of IRS2118PBF

• Configuration: High-Side
• Input Type: Inverting
• Delay Time: 125ns
• Current - Peak: 290mA
• Number Of Configurations: 1
• Number Of Outputs: 1
• High Side Voltage - Max (bootstrap): 600V
• Voltage - Supply: 10 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Figure 10: Parasitic Elements
However, in a real inverter circuit, the V
rather it swings below the level of the negative DC bus. This undershoot voltage is called “negative V
transient”.
The circuit shown in Figure 10 depicts a half bridge circuit with parasitic elements shown; Figures 11 and 12
show a simplified illustration of the commutation of the current between Q1 and D2. The parasitic inductances
in the power circuit from the die bonding to the PCB tracks are lumped together in L
When the high-side switch is on, V
switch and the parasitic elements of the circuit. When the high-side power switch turns off, the load current can
momentarily flow in the low-side freewheeling diode due to the inductive load connected to V
shown in these figures). This current flows from the DC- bus (which is connected to the COM pin of the HVIC)
to the load and a negative voltage between V
a higher potential than the V
In a typical power circuit, dV/dt is typically designed to be in the range of 1-5 V/ns. The negative V
voltage can exceed this range during some events such as short circuit and over-current shutdown, when di/dt
is greater than in normal operation.
International Rectifier’s HVICs have been designed for the robustness required in many of today’s demanding
applications. An indication of the IRS211(7,71,8)’s robustness can be seen in Figure 13, where there is
represented the IRS211(7,71,8) Safe Operating Area at V
negative V
viceversa unwanted functional anomalies or permanent damage to the IC do not appear if negative Vs
transients fall inside SOA.
Figure 8: D1 conducting
S
transient voltage falling in the grey area (outside SOA) may lead to IC permanent damage;
OFF
OFF
Q1
Q2
DC+ BUS
DC- BUS
V
S
D1
D2
S
pin).
I
L
S
is below the DC+ voltage by the voltage drops associated with the power
S
Figure 11: V
voltage swing does not stop at the level of the negative DC bus,
S
and the DC- Bus is induced (i.e., the COM pin of the HVIC is at
12
S
positive
BS
=15V based on repetitive negative V
Figure 9: Q2 conducting
OFF
Q1
ON
Q2
DC+ BUS
DC- BUS
V
S
IRS211(7,71,8)(S)
Figure 12: V
OFF
OFF
Q1
Q2
© 2008 International Rectifier
D1
D
DC+ BUS
V
DC- BUS
S
and L
I
L
+
_
+
_
V
V
LD2
LS2
S
S
S
D1
D2
negative
for each switch.
(the load is not
I
S
L
S
spikes. A
transient
S