IRS2336DJTRPBF International Rectifier, IRS2336DJTRPBF Datasheet - Page 28

IC GATE DRIVER HV 3PHASE 44-PLCC

IRS2336DJTRPBF

Manufacturer Part Number
IRS2336DJTRPBF
Description
IC GATE DRIVER HV 3PHASE 44-PLCC
Manufacturer
International Rectifier
Datasheet

Specifications of IRS2336DJTRPBF

Configuration
3 Phase Bridge
Input Type
Differential
Delay Time
530ns
Current - Peak
200mA
Number Of Configurations
1
Number Of Outputs
3
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
44-PLCC (32 Leads)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IRS2336DJTRPBFTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IRS2336DJTRPBF
Manufacturer:
International Rectifier
Quantity:
10 000
IRS2336x(D) Family
Figure 20: IRS2336xD input filter characteristic
Figure 21: Difference between the input pulse and the output pulse
Integrated Bootstrap Functionality
The new IRS2336xD family features integrated high-voltage bootstrap MOSFETs that eliminate the need of the
external bootstrap diodes and resistors in many applications.
There is one bootstrap MOSFET for each high-side output channel and it is connected between the V
supply and
CC
its respective floating supply (i.e., V
, V
, V
); see Figure 22 for an illustration of this internal connection.
B1
B2
B3
The integrated bootstrap MOSFET is turned on only during the time when LO is ‘high’, and it has a limited source
current due to R
. The V
voltage will be charged each cycle depending on the on-time of LO and the value of the
BS
BS
C
capacitor, the drain-source (collector-emitter) drop of the external IGBT (or MOSFET), and the low-side free-
BS
wheeling diode drop.
The bootstrap MOSFET of each channel follows the state of the respective low-side output stage (i.e., the bootstrap
MOSFET is ON when LO is high, it is OFF when LO is low), unless the V
voltage is higher than approximately 110%
B
of V
. In that case, the bootstrap MOSFET is designed to remain off until V
returns below that threshold; this
CC
B
concept is illustrated in Figure 23.
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28

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