LT1162CSW#TRPBF Linear Technology, LT1162CSW#TRPBF Datasheet - Page 3
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LT1162CSW#TRPBF
Manufacturer Part Number
LT1162CSW#TRPBF
Description
IC PWR MOSFET DRIVER NCH 24SOIC
Manufacturer
Linear Technology
Datasheet
1.LT1160CSPBF.pdf
(16 pages)
Specifications of LT1162CSW#TRPBF
Configuration
Half Bridge
Input Type
Non-Inverting
Delay Time
250ns
Current - Peak
1.5A
Number Of Configurations
2
Number Of Outputs
4
High Side Voltage - Max (bootstrap)
60V
Voltage - Supply
10 V ~ 15 V
Operating Temperature
25°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
temperature range, otherwise specifications are at T
3000pF. Gate Feedback pins connected to Gate Drive pins, unless otherwise specified.
ELECTRICAL CHARACTERISTICS
I
V
V
V
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: For the LT1160, Pins 1, 10 should be connected together. For the
LT1162, Pins 1, 7, 14, 20 should be connected together.
Note 3: T
dissipation P
SYMBOL PARAMETER
UVOUT
r
f
D1
D2
D3
D4
UVOUT
OH
OL
LT1160CN/LT1160IN: T
LT1160CS/LT1160IS: T
LT1162CN/LT1162IN: T
LT1162CS/LT1162IS: T
J
Undervoltage Output Leakage
Undervoltage Output Saturation
Top Gate ON Voltage
Bottom Gate ON Voltage
Top Gate OFF Voltage
Bottom Gate OFF Voltage
Top Gate Rise Time
Bottom Gate Rise Time
Top Gate Fall Time
Bottom Gate Fall Time
Top Gate Turn-On Delay
Bottom Gate Turn-On Delay
Top Gate Turn-Off Delay
Bottom Gate Turn-Off Delay
Top Gate Lockout Delay
Bottom Gate Lockout Delay
Top Gate Release Delay
Bottom Gate Release Delay
is calculated from the ambient temperature T
D
according to the following formulas:
J
J
J
J
= T
= T
= T
= T
A
A
A
A
+ (P
+ (P
+ (P
+ (P
D
D
D
D
)(110°C/W)
)(80°C/W)
)(70°C/W)
)(58°C/W)
A
and power
A
V
V
V
V
V
V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
V
Measured at V
CONDITIONS
= 25°C.Test Circuit, T
INTOP
INTOP
INTOP
INTOP
INTOP
INBOTTOM
INTOP
INBOTTOM
INTOP
INBOTTOM
INTOP
INBOTTOM
INBOTTOM
INTOP
INBOTTOM
INTOP
+
+
= 15V
= 7.5V, I
The
= 2V, V
= 0.8V, V
= 0.8V, V
= 2V, V
(+) Transition, V
(–) Transition, V
(+) Transition, V
(–) Transition, V
(+) Transition, V
(–) Transition, V
(+) Transition, V
(–) Transition, V
(+) Transition, V
(–) Transition, V
(+) Transition, V
(–) Transition, V
●
UVOUT
denotes the specifications which apply over the full operating
TGATE DR
BGATE DR
TGATE DR
BGATE DR
TGATE DR
BGATE DR
TGATE DR
BGATE DR
TGATE DR
BGATE DR
TGATE DR
BGATE DR
INBOTTOM
INBOTTOM
INBOTTOM
INBOTTOM
= 2.5mA
Note 4: I
I
higher due to the gate charge being delivered at the switching frequency.
See Typical Performance Characteristics and Applications Information
sections. The LT1160 = 1/2 LT1162.
Note 5: See Timing Diagram. Gate rise times are measured from 2V to 10V
and fall times are measured from 10V to 2V. Delay times are measured
from the input transition to when the gate voltage has risen to 2V or
decreased to 10V.
BOOST
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
INBOTTOM
(Note 5)
INBOTTOM
(Note 5)
INBOTTOM
(Note 5)
INBOTTOM
(Note 5)
INBOTTOM
(Note 5)
INBOTTOM
(Note 5)
= 0.8V
= 0.8V
= 2V
= 2V
A
is the current through the Boost pin. Dynamic supply current is
INTOP
INTOP
INTOP
INTOP
INTOP
INTOP
= 25°C, V
S
is the sum of currents through SV
= 0.8V,
= 0.8V,
= 0.8V,
= 0.8V,
= 0.8V,
= 0.8V,
= 0.8V,
= 0.8V,
= 2V,
= 2V,
= 2V,
= 2V,
+
= V
BOOST
= 12V, V
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
MIN
11
11
LT1160/LT1162
TSOURCE
+
, PV
11.3
11.3
TYP
130
250
200
300
200
300
250
250
200
0.1
0.2
0.4
0.4
90
60
60
+
= 0V, C
and Boost pins.
MAX
200
200
140
140
500
400
600
400
600
500
500
400
0.4
0.7
0.7
12
12
5
GATE
=
11602fb
UNITS
3
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V