IRS2003SPBF International Rectifier, IRS2003SPBF Datasheet - Page 2
IRS2003SPBF
Manufacturer Part Number
IRS2003SPBF
Description
IC DRIVER HALF BRIDGE 200V 8SOIC
Manufacturer
International Rectifier
Datasheet
1.IRS2003STRPBF.pdf
(14 pages)
Specifications of IRS2003SPBF
Configuration
Half Bridge
Input Type
Inverting and Non-Inverting
Delay Time
680ns
Current - Peak
290mA
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
200V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IRS2003SPBF
Manufacturer:
IR
Quantity:
20 000
www.irf.com
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V
Note 1: Logic operational for V
DT97-3 for more details).
Symbol
Symbol
dV s /dt
Rth
V
V
V
V
V
V
V
V
V
V
V
P
T
V
T
T
T
HO
CC
HO
CC
LO
LO
IN
IN
D
B
S
S
L
B
S
A
J
JA
High-side floating absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (HIN & LIN )
Allowable offset supply voltage transient
Package power dissipation @ T
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (HIN & LIN )
Ambient temperature
S
S
of -5 V to +200 V. Logic state held for V
offset rating is tested with all supplies biased at a 15 V differential.
Definition
Definition
A
+25 °C
(8 Lead PDIP)
(8 Lead SOIC)
(8 Lead PDIP)
(8 Lead SOIC)
S
of -5 V to -V
V
V
V
Note 1
Min.
Min.
IRS2003(S)PbF
S
S
B
-0.3
-0.3
-0.3
-0.3
-55
-40
—
—
—
—
—
—
—
V
10
0
BS
- 0.3
+ 10
0
- 25
S
. (Please refer to the Design Tip
V
V
V
V
V
CC
Max.
CC
Max.
0.625
B
B
S
V
125
200
150
150
300
V
125
225
200
1.0
50
V
25
20
+ 0.3
CC
+ 0.3
+ 20
CC
+ 0.3
+ 0.3
B
Units
Units
V/ns
°C/W
°C
°C
W
V
V
2