IR2110STRPBF International Rectifier, IR2110STRPBF Datasheet - Page 2

• Manufacturer Part Number: IR2110STRPBF
• Description: IC DRIVER HIGH/LOW SIDE 16SOIC
• Manufacturer: International Rectifier

Specifications of IR2110STRPBF

• Configuration: High and Low Side, Independent
• Input Type: Non-Inverting
• Delay Time: 120ns
• Current - Peak: 2.5A
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 500V
• Voltage - Supply: 10 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Package: 16SOIC W
• Driver Configuration: Non-Inverting
• Driver Type: High and Low Side
• Peak Output Current: 2.5(Typ) A
• Input Logic Compatibility: CMOS|LSTTL|3.3V(Min)
• Maximum Fall Time: 25 ns
• Maximum Rise Time: 35 ns
• Maximum Power Dissipation: 1250 mW
• Maximum Supply Current: 0.34 mA
• Number Of Drivers: 2
• Input Logic Level: CMOS/LSTTL/3.3V
• Rise Time: 35ns
• Fall Time: 25ns
• Propagation Delay Time: 150ns
• Operating Supply Voltage (max): 20V
• Power Dissipation: 1.25W
• Operating Supply Voltage (min): 10V
• Turn Off Delay Time: 10ns
• Turn On Delay Time (max): 10ns
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: IR2110SPBFTR

Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.
IR2110(-1-2)(S)PbF/IR2113(-1-2)(S)PbF
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V S and V SS offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in figures 36 and 37.
Note 1: Logic operational for V
DT97-3 for more details).
Note 2: When V
Symbol
Symbol
2
R
dV
V
V
V
V
V
V
V
V
V
V
V
THJA
V
V
V
P
T
T
V
V
T
T
HO
CC
DD
LO
SS
HO
CC
DD
s
LO
SS
IN
D
S
IN
B
S
L
A
J
B
S
/dt
High side floating supply voltage (IR2110)
High side floating supply offset voltage
High side floating output voltage
Low side fixed supply voltage
Low side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD)
Allowable offset supply voltage transient (figure 2)
Package power dissipation @ T
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side fixed supply voltage
Low side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD)
Ambient temperature
DD
< 5V, the minimum V
S
of -4 to +500V. Logic state held for V
Definition
Definition
SS
offset is limited to -V
A
(IR2113)
+25°C
(IR2113)
(IR2110)
(16 lead SOIC)
(16 lead SOIC)
(14 lead DIP)
(14 lead DIP)
DD.
S
of -4V to -V
-5 (Note 2)
V
V
BS
V
V
V
V
SS
Note 1
Note 1
CC
Min.
Min.
S
S
SS
B
-0.3
-0.3
-0.3
-0.3
-0.3
V
. (Please refer to the Design Tip
-55
-40
V
—
—
—
—
—
—
—
10
- 0.3
0
+ 10
SS
- 25
- 0.3
S
- 25
+ 3
V
V
V
V
V
V
V
V
CC
CC
DD
Max.
SS
Max.
SS
B
B
S
1.25
V
V
525
625
100
150
150
300
500
600
125
1.6
25
50
75
V
20
+ 0.3
+ 0.3
CC
5
DD
+ 20
+ 0.3
+ 0.3
+ 0.3
+ 25
B
+ 20
www.irf.com
Units
Units
°C/W
V/ns
°C
W
V
°C
V