IRS2332DJPBF International Rectifier, IRS2332DJPBF Datasheet - Page 23

IC DVR 3-PHASE BRIDGE PLCC44

IRS2332DJPBF

Manufacturer Part Number
IRS2332DJPBF
Description
IC DVR 3-PHASE BRIDGE PLCC44
Manufacturer
International Rectifier
Datasheet

Specifications of IRS2332DJPBF

Configuration
3 Phase Bridge
Input Type
Inverting
Delay Time
500ns
Current - Peak
250mA
Number Of Configurations
1
Number Of Outputs
3
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IRS2332DJPBF
Manufacturer:
International Rectifier
Quantity:
10 000
IRS233(0,2)(D)(S&J)PbF
Figure 32: Operational Amplifier Common mode rejection
Figure 33: Operational Amplifier Power supply rejection
measurement
measurement
PCB Layout Tips
Distance between high and low voltage components: It’s strongly recommended to place the components tied to the floating
voltage pins (V
and V
) near the respective high voltage portions of the device. The IRS233(0,2)(D) in the PLCC44 package
B
S
has had some unused pins removed in order to maximize the distance between the high voltage and low voltage pins.
Please see the Case Outline PLCC44 information in this datasheet for the details.
Ground Plane: In order to minimize noise coupling, the ground plane should not be placed under or near the high voltage
floating side.
Gate Drive Loops: Current loops behave like antennas and are able to receive and transmit EM noise (see Figure 34). In order
to reduce the EM coupling and improve the power switch turn on/off performance, the gate drive loops must be reduced as
much as possible. Moreover, current can be injected inside the gate drive loop via the IGBT collector-to-gate parasitic
capacitance. The parasitic auto-inductance of the gate loop contributes to developing a voltage across the gate-emitter, thus
increasing the possibility of a self turn-on effect.
Figure 34: Antenna Loops
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