MCZ33937EK Freescale Semiconductor, MCZ33937EK Datasheet - Page 10

• Manufacturer Part Number: MCZ33937EK
• Description: IC PRE-DRIVER 3PHASE 54-SOIC
• Manufacturer: Freescale Semiconductor
• Series: SMARTMOS™r

Specifications of MCZ33937EK

• Configuration: 3 Phase Bridge
• Input Type: Non-Inverting
• Delay Time: 265ns
• Current - Peak: 600mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 15V
• Voltage - Supply: 8 V ~ 40 V
• Operating Temperature: -40°C ~ 135°C
• Mounting Type: Surface Mount
• Package / Case: 54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
• Product: H-Bridge Drivers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 4. Static Electrical Characteristics (continued)
values noted reflect the approximate parameter means at T
10
33937
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
CHARGE PUMP
GATE DRIVE
Notes
Charge Pump
Charge Pump Output Voltage
High Side Driver On Resistance (Sourcing)
High Side Driver On Resistance (Sinking)
High Side Current Injection Allowed Without Malfunction
Low Side Driver On Resistance (Sourcing)
Low Side Driver On-Resistance (Sinking)
Low Side Current Injection Allowed Without Malfunction
Gate Source Voltage, V
High Side Gate Drive Output Leakage Current, Per Output
15.
16.
17.
18.
19.
20.
Characteristics noted under conditions 8.0 V
High Side Switch On Resistance
Low Side Switch On Resistance
Regulation Threshold Difference
I
I
V
V
V
V
V
V
High Side, I
Low Side, I
OUT
OUT
PWR
PWR
PWR
PWR
PWR
PWR
When VLS is this amount below the normal VLS linear regulation threshold, the charge pump is enabled.
V
Charge Pump is designed to supply the gate currents of a system with 100 A FETs in a 12 V application.
This parameter is a design characteristic, not production tested.
Current injection only occurs during output switch transitions. The IC is immune to specified injected currents for a duration of
approximately 1.0µs after an output switch transition. 1.0 µs is sufficient for all intended applications of this IC.
If a slightly higher gate voltage is required, larger bootstrap capacitors are required. At high duty cycles, the bootstrap voltage may not
recover completely, leading to a higher output on-resistance. This effect can be minimized by using low ESR capacitors for the bootstrap
and the VLS capacitors.
A small internal charge pump will supply up to 30 A nominal to compensate for leakage on the High Side FET gate output and maintain
voltages after bootstrap events. It is not intended for external components to be connected to the High Side FET gate, but small amounts
of additional leakage can be accommodated. See
SYS
= 40 mA, 6.0 V < V
= 40 mA, V
= V
= V
= V
= V
= V
= V
is the system voltage on the input to the charge pump. With recommended external components (1.0 µF, MUR 120 diode). The
SUP
SUP
SUP
SUP
SUP
SUP
GATE
GATE
= 16 V, -40 C
= 16 V, 25 C
= 16 V
= 16 V, -40 C
= 16 V, 25 C
= 16 V
SYS
= 0
= 0
> = 8.0 V
PWR
(19)
SYS
Characteristic
= V
(16),
< 8.0 V
SUP
T
T
T
T
(17)
A
A
A
A
(15),
= 40 V
135 C
135 C
25 C
25 C
(17)
V
(17),
PWR
(17),
Figures 11
(20)
(18)
(18)
= V
SUP
A
= 25°C under nominal conditions, unless otherwise noted.
through
40 V -40 C
R
R
R
R
DS(ON)_H_SINK
DS(ON)_H_SRC
DS(ON)_L_SINK
DS(ON)_L_SRC
R
R
14
I
Symbol
V
DS(on)_HS
HS_LEAK
DS(on)_LS
I
I
V
V
HS_INJ
LS_INJ
THREG
V
GS_H
GS_L
for typical load margins.
CP
T
A
135 C, unless otherwise noted. Typical
Min
250
8.5
12
13
13
–
–
–
–
–
–
–
–
–
–
–
Analog Integrated Circuit Device Data
14.8
15.4
Typ
500
6.0
5.0
9.5
–
–
–
–
–
–
–
–
–
–
Freescale Semiconductor
Max
16.5
900
9.4
6.0
8.5
3.0
0.5
6.0
8.5
3.0
0.5
10
17
18
–
–
Unit
mV
µA
V
A
V