IR2011S International Rectifier, IR2011S Datasheet

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IR2011S

Manufacturer Part Number
IR2011S
Description
HI/LO SIDE DRVR 8SOIC
Manufacturer
International Rectifier
Datasheet
1.IR2011SPBF.pdf (17 pages)

Specifications of IR2011S

Configuration
High and Low Side, Independent
Input Type
Non-Inverting
Delay Time
80ns
Current - Peak
1A
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
200V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*IR2011S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
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Applications
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Features
·
·
·
·
·
·
·
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Typical Connection
www.irf.com
Description
The IR2011 is a high power, high speed power MOSFET driver with independent high
and low side referenced output channels, ideal for Audio Class D and DC-DC converter
applications. Logic inputs are compatible with standard CMOS or LSTTL output, down
to 3.0V logic. The output drivers feature a high pulse current buffer stage designed for
minimum driver cross-conduction. Propagation delays are matched to simplify use in
high frequency applications. The floating channel can be used to drive an N-channel
power MOSFET in the high side configuration which operates up to 200 volts. Propri-
etary HVIC and latch immune CMOS technologies enable ruggedized monolithic con-
struction.
(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please
refer to our Application Notes and DesignTips for proper circuit board layout.
Audio Class D amplifiers
High power DC-DC SMPS converters
Other high frequency applications
Floating channel designed for bootstrap operation
Fully operational up to +200V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 10V to 20V
Independent low and high side channels
Input logicHIN/LIN active high
Undervoltage lockout for both channels
3.3V and 5V input logic compatible
CMOS Schmitt-triggered inputs with pull-down
Matched propagation delay for both channels
Also available LEAD-FREE (PbF)
COM
HIN
V
LIN
CC
5
8
COM
HIN
LIN
LO
V
HO
V
V
CC
S
B
4
1
HIGH AND LOW SIDE DRIVER
Product Summary
Delay Matching
V
OFFSET
V
t
I
on/off
O
OUT
+/-
IR2011(
Data Sheet No.PD60217 revB
Packages
80 & 60 ns typ.
8-Lead PDIP
1.0A /1.0A typ.
200V
8-Lead SOIC
IR2011
20 ns max.
200V max.
IR2011S
10 - 20V
S) & (PbF
LOAD
TO
)
1

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IR2011S Summary of contents

Page 1

... Application Notes and DesignTips for proper circuit board layout. www.irf.com HIGH AND LOW SIDE DRIVER Product Summary V OFFSET I +/- O V OUT t on/off Delay Matching Data Sheet No.PD60217 revB IR2011 & (PbF 200V max. 1.0A /1.0A typ 20V 80 & typ max. Packages 8-Lead SOIC IR2011S 8-Lead PDIP IR2011 200V TO LOAD 1 ...

Page 2

IR2011(S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under ...

Page 3

Dynamic Electrical Characteristics 15V 1000 pF, T BIAS Symbol Definition t Turn-on propagation delay on t Turn-off propagation delay off t Turn-on rise time r t Turn-off fall time ...

Page 4

... Low side supply CC LO Low side gate drive output COM Low side return Lead Assignments HIN S HO LIN COM 8-Lead PDIP IR2011 4 UV HIGH DETECT VOLTAGE LEVEL SHIFT CIRCUIT BUFFER Part Number DETECT LO DELAY COM HIN S HO LIN COM 8-Lead SOIC IR2011S www.irf.com ...

Page 5

DM1 Figure 1. Timing Diagram IR2011(S) & (PbF) 50% HIN / LIN t fall 90% t (H) off HO 10% DM2 90% t (L) off LO 5 ...

Page 6

IR2011(S) & (PbF) 500 400 300 200 100 T yp. 0 -50 - Temperature ( Figure 2A. Turn-on Propagation Delay vs. Temperature 500 400 300 200 100 Typ. 0 -50 - Temperature ( ...

Page 7

Max. 40 Typ -50 - Temperature ( Figure 4A. Turn-on Rise Time vs. Temperature 50 40 Max. 30 Typ -50 - Temperature ( Figure 5A. ...

Page 8

IR2011(S) & (PbF Max Typ. 0 -50 - Temperature ( C) Figure 6A. Turn-on Delay Matching Time vs. Temperature Max Typ. 0 -50 - ...

Page 9

Min -50 - Temperature ( C) Figure 8A. Logic "1" Input Voltage vs. Temperature Max -50 - Temperature ( C) ...

Page 10

IR2011(S) & (PbF Max -50 - Temperature ( C) Figure 10A. High Level Output vs.Temperature 0.5 0.4 0.3 0.2 Max. 0.1 0.0 -50 - Temperature ( ...

Page 11

Max. 0 -50 - Temperature ( Figure 12A. Offset Supply Leakage Current vs. Tem perature 600 500 400 300 200 100 Max. 0 Typ. -50 - Temperature ( www.irf.com ...

Page 12

IR2011(S) & (PbF) 600 500 400 300 Max. 200 Typ. 100 0 -50 - Temperature ( Figure 14A. V Supply Current CC vs. Tem perature 100 Max. Typ. 0 -50 - ...

Page 13

Max -50 - Temperature ( Figure 16A. Logic "0" Input Bias Current vs. Tem perature Max. 9 Typ. Min -50 - ...

Page 14

IR2011(S) & (PbF Typ -50 - Temperature ( Figure19A. Output Source Current vs. Temperature Typ. 0 -50 - Temperature ( Figure ...

Page 15

Typ Floating Supply Voltage (V) BS Figure 21. Maximum V Negative Offset S vs. V Floating Supply Voltage BS IR2011(S) & (PbF ...

Page 16

IR2011(S) & (PbF) Case outlines 0.25 [.010 0.25 [.010 NOTES: 1. DIMENSIONING & TOLERANCING PER ASME ...

Page 17

... IR2011(S) & (PbF) IRxxxxxx YWW? ?XXXX (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 Leadfree Part 8-Lead PDIP IR2011 order IR2011PbF 8-Lead SOIC IR2011S order IR2011SPbF Data and specifications subject to change without notice IR logo Lot Code http://www.irf.com/ 3/4/2008 . 17 ...

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