ATA6824-MFHW Atmel, ATA6824-MFHW Datasheet
ATA6824-MFHW
Specifications of ATA6824-MFHW
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ATA6824-MFHW Summary of contents
Page 1
... PWM frequency. In PWM opera- tion, the high-side switches are permanently on while the low-side switches are activated by the PWM frequency. Atmel ATA6824 contains a voltage regulator to sup- ply the microcontroller; via the input pin VMODE the output voltage can be set ...
Page 2
... VRES CP CPLO Charge C CP Pump CPIH 12V VG Regulator C VG PBAT Vint 5V Regulator VINT C VINT VBAT CP VBATSW VCC 5V Regulator VCC C VCC Atmel ATA6824 GATE GATE VRES Driver 2 HS Driver 1 OTP 12 bit Logic Control Oscillator VBG Bandgap TP2 WD DIR VMODE /RESET Microcontroller R R GATE ...
Page 3
... Receive signal from serial interface for microcontroller Diagnostic output 3 Diagnostic output 2 Diagnostic output 1 Source voltage H-bridge, high-side 1 Gate voltage H-bridge, high-side 1 Source voltage H-bridge, high-side 2 Gate voltage H-bridge, high-side 2 Gate voltage for reverse protection NMOS, blocking capacitor 470nF/25V/X7R Atmel ATA6824 CPLO 22 CPHI 21 VRES ...
Page 4
... Qualification of integrated circuits according to Atmel AEC-Q100 • AEC-Q100-004 and JESD78 (Latch-up) • ESD STM 5.1-1998 • CEI 801-2 (only for information regarding ESD requirements of the PCB) Atmel ATA6824 4 Function Charge pump capacitor 220nF/25V/X7R Blocking capacitor 470nF/25V/X7R Power supply (after reverse protection) for charge pump and H-bridge ...
Page 5
... Filter capacitor for SIO SIO Figure 1-1 on page The internal supply voltage V must not be used for any other supply purpose! INT Atmel ATA6824 ® ATA6824 was designed. Figure 1-1 on page 2) Value 220nF, 10V, X7R 2.2µF, 10V, X7R Typical 680pF, 100V, COG Typical 10k ...
Page 6
... IC is mounted on an efficient heat sink. A power-good comparator checks the output voltage of the VCC regulator and keeps the external microcontroller in reset as long as the voltage is too low. Atmel ATA6824 6 ) and of undervoltage alarm (V THOV < ...
Page 7
... Voltage Dependence and Timing of VCC Controlled RESET T VCC 5V V tHRES /RESET Correlation between VCC Output Voltage and Reset Threshold VCC 5.15V 4.9V 4.85V 4.1V V CC1-VtHRESH Atmel ATA6824 T delayRESL res V CC1 Tracking voltage V CC1-tHRESH V tHRESH = CC1 tHRESH . . t resshort t 2 OSC t d ...
Page 8
... T wdmax T wdmin T = 16.42ms ±3.15ms (±19.1%) wd Figure 5-4 on page 8 external resistor R A reset will be active for V (HYS Atmel ATA6824 8 = 12.32µ 12.1ms 9.61ms 70ms and t = 70ms are fixed values with a tolerance of 10%. res d and wait t for the rising edge on WD. ...
Page 9
... This diode prevents the reverse current of VBUS during differential voltage between VSUP and BUS (V 4931L–AUTO–02/ Bit Bit t SIO_dom(max) SIO Signal t SIO_dom(min) t rx_pdf(1) t rx_pdr(2) > BUS SUP Atmel ATA6824 . SIO_LIM_RESET t Bit t SIO_rec(min) Thresholds of receiving node 1 Thresholds of receiving node 2 t SIO_rec(max) t rx_pdr(1) t rx_pdf(2) 9 ...
Page 10
... PBAT_UV: Undervoltage PBAT pin SC: Short circuit drain source monitoring VBAT_UV: Undervoltage of VBAT pin VBAT_OV: Overvoltage of VBAT pin CPOK: Charge pump OK OT: Overtemperature warning Atmel ATA6824 10 Status of the IC Depending on Control Inputs and Detected Failures Control Inputs Driver Stage for External Power MOS DIR ...
Page 11
... The time measurement is triggered by the PWM or DIR signal crossing the 50% level. 4931L–AUTO–02/11 Table 5-1 on page 10). The duty cycle of the PMW controls the speed. A duty cycle (nF) (tolerance: ±5% ±0.15µ must be greater than 5k and should be as close as possible to 10k , the CC Atmel ATA6824 plus VG. The charge pump is clocked VBAT > VBAT THOV 11 ...
Page 12
... If the voltage at PBAT falls under V off and DG1 will be set to “H”. It will be cleared as soon as the PBAT undervoltage condition disappears. The detection of drain source voltage exceedances is activated after the short circuit blanking time t Atmel ATA6824 12 Timing of the Drivers 50% t ...
Page 13
... VMODE –0.3 VG –0.3 RX –0.3 TX –0.3 (1) SIO –27 S1, S2 –2 L1 – 0.3 PGND (3) H1 – CPLO –0.3 CPHI –0.3 VRES –0.3 VBATSW –0.3 P tot –55 STORE Atmel ATA6824 Max Unit 0 V +0 0.3 V VCC V + 0.3 V VCC +5 0.3 V VCC V + 0.3 V VCC V + 0.3 V VCC ...
Page 14
... H-bridge drivers are switched off 9. Noise and Surge Immunity Parameters Conducted interferences Interference suppression ESD (Human Body Model) CDM (Charge Device Model) Notes: 1. Test pulse 40V vbmax 2. Exception: 1kV at pin 8 (SIO) Atmel ATA6824 14 Symbol Value R < 5 thjc R 25 thja Symbol Min ...
Page 15
... VBAT 29 = 0mA to 100mA 9V VBAT 29 = 0mA to 100mA 9V VBAT = 0mA to 80mA 29 > 125° 0mA to 100mA 29 = 0mA to 100mA 29 > VBAT “Definition of Bus Timing Parameters” Atmel ATA6824 Symbol Min Typ I VBAT1 V 4.8 4.94 INT V 1.235 BG V 21.2 THOV_UP V 19.8 THOV_DOWN V 1 TOVhys V 6 ...
Page 16
... See section “Cross Conduction Time” 9. Voltage between source-drain of external switching transistors in active case 10. The short-circuit message will never be generated for switch-on time < t 11. See Figure 5-5 on page 9 Atmel ATA6824 and for –40°C ambient 150°C unless stated otherwise. VBAT ...
Page 17
... VBAT 8 = 1000 load = 18V VBAT 8 = 1000 load SIO BAT_max = V SIO BAT_max 8 I SIO_LIM_RESET SIO = 12V VBAT “Definition of Bus Timing Parameters” Atmel ATA6824 Symbol Min Typ 0.7 V IHWD V VCC V 0.3 hysWD 980 t1 T OSC 780 t2 T OSC V OLRES PURES IL 2 ...
Page 18
... See section “Cross Conduction Time” 9. Voltage between source-drain of external switching transistors in active case 10. The short-circuit message will never be generated for switch-on time < t 11. See Figure 5-5 on page 9 Atmel ATA6824 and for –40°C ambient 150°C unless stated otherwise. VBAT ...
Page 19
... VBAT THOV Pin 10, 11 10, 11 10, 11 10, 11 10, 11 100nF 100nF 26, 27 26, 27 26, 27 “Definition of Bus Timing Parameters” Atmel ATA6824 Symbol Min Typ Max 0 0 VCC HYS 0.3 0 VCP + V V VBAT VCP + V – ...
Page 20
... See section “Cross Conduction Time” 9. Voltage between source-drain of external switching transistors in active case 10. The short-circuit message will never be generated for switch-on time < t 11. See Figure 5-5 on page 9 Atmel ATA6824 and for –40°C ambient 150°C unless stated otherwise. VBAT ...
Page 21
... Pin = 13.5V 18, 20 VBAT = 13.5V, VBAT 18 5nF Gx = 13.5V 18, 20 VBAT 10k 1nF CC 17, 19 17, 19 14, 15, ( 14, 15, (6) = VCC – 0. “Definition of Bus Timing Parameters” Atmel ATA6824 Symbol Min Typ Max t 0 HxLH t 0.5 Hxf t 0.5 Hxr 200 ONCC t 3.75 4. 3 ...
Page 22
... General condition: PWM = HIGH and detected undervoltage of VBAT (signalized at pin 15 = DG2) or detected overvoltage of VBAT (signalized at pin 15 = DG2) or detected undervoltage of the charge pump (signalized at pin 15 = DG2) or overtemperature shutdown 11.2 Problem Fix/Workaround Set software to ignore the faulty pulse. Atmel ATA6824 22 4931L–AUTO–02/11 ...
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... Ordering Information Extended Type Number ATA6824-PNQW ATA6824-MFHW 13. Package Information Package: QFN_ 5 x 5_32L Exposed pad 3.6 x 3.6 Dimensions in mm Not indicated tolerances ±0.05 Pin1 identification Drawing-No.: 6.543-5124.01-4 Issue: 1; 28.11.05 4931L–AUTO–02/11 Package QFN32, 5mm 5mm TPQFP32, 7mm 7mm Top 0.2 0.9 ± ...
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... Package Drawing Contact: packagedrawings@atmel.com Atmel ATA6824 TITLE Package: epad TPQFP32 (acc. JEDEC OUTLINE) technical drawings according to DIN specifications Dimensions in mm COMMON DIMENSIONS (Unit of Measure = mm) Symbol MIN NOM MAX NOTE A 1.2 A1 0.05 0.15 A2 0. BSC D1 7 BSC D2 3.5 BSC E 9 BSC ...
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... Section 12 “Ordering Information” on page 22 changed Section 13 “Package Information” on page 22 changed Section 5.2 “5V/3.3V VCC Regulator” on pages changed Section 5.4 “High Voltage Serial Interface” on page 9 changed Section 10 “Electrical Characteristics” numbers 4.1a and 4.3 on page 16 changed Atmel ATA6824 25 ...
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