ATA6833-PLQW Atmel, ATA6833-PLQW Datasheet - Page 6
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ATA6833-PLQW
Manufacturer Part Number
ATA6833-PLQW
Description
IC BLDC MOTOR DVR/LIN SBC 48VQFN
Manufacturer
Atmel
Type
3 Phase Brushless DC Motor Controllerr
Datasheet
1.ATA6833-PLQW.pdf
(27 pages)
Specifications of ATA6833-PLQW
Applications
DC Motor Controller, Brushless (BLDC), 3 Phase
Number Of Outputs
1
Voltage - Supply
5.5 V ~ 22.3 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Product
Fan / Motor Controllers / Drivers
Supply Current
7 mA
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Load
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
3.2
Active Mode and Sleep Mode
The IC has two modes: Sleep Mode and Active Mode. Switching between the modes is
described below. By default the IC starts in Active Mode (which means normal operation) after
power-on. A Go to Sleep procedure switches the IC from Active Mode to Sleep Mode
(standby). A Go to Active procedure brings the IC back from Sleep Mode to Active Mode.
When in Sleep Mode the internal 5V supply (VINT regulator), the EN2 pin input structure, and
a certain part of the LIN receiver remain active to ensure a proper startup of the system. The
VCC regulator is turned off.
The Go to Sleep and Go to Active procedures are implemented as follows:
Go to Sleep
Pin EN1 is a low-voltage input supplied by the VCC regulator. It is ESD protected by diodes
against VCC and GND. Thus the input voltage at pin EN1 must not go below GND or exceed
the output voltage of the VCC regulator. A transition from HIGH to LOW followed by a perma-
nent LOW signal for a minimum time period t
(typical 10µs) at pin EN1 switches the IC
gotosleep
to Sleep Mode as the EN1 is edge triggered. V
is switched off in Sleep Mode. It is recom-
CC
mended to keep EN1 LOW during normal operation.
Go to Active Using Pin EN2
Pin EN2 is a high-voltage input for external wake-up signals. Its input structure consists of a
comparator with a built-in hysteresis. It is ESD-protected by diodes against GND and V
, B,
BAT
and for this reason the applied input voltage must not go below GND or exceed V
. Pulling
BAT
EN2 up to V
switches the IC to Active Mode. EN2 is debounced and edge triggered.
BAT
Go to Active Using the LIN Interface
Using the LIN interface provides a second possibility to wake-up the IC (see
Figure
3-1). A fall-
ing edge at pin LIN followed by a dominant bus level maintained for a minimum time period
(T
) and ending with a rising edge leads to a remote wake-up request. The device switches
bus
from Sleep Mode to Active Mode. The VCC regulator is activated and the internal LIN slave
termination resistor is switched on.
Figure 3-1.
Wake-up Using the LIN Interface
Active Mode
Sleep Mode
Active Mode
EN1
T
debounce
VCC
LIN
T
= 10µs
T
= 90µs
Regulator Wake-up Time = 4 T
OSC
gotosleep
bus
Atmel ATA6833/ATA6834 [Preliminary]
6
9122G–AUTO–10/10