AMIS30621C6217G ON Semiconductor, AMIS30621C6217G Datasheet - Page 39

• Manufacturer Part Number: AMIS30621C6217G
• Description: IC MOTOR STEPPER DVR/CTLR 20SOIC
• Manufacturer: ON Semiconductor
• Type: Micro Stepping Motor Driverr

Specifications of AMIS30621C6217G

• Number Of Outputs: 4
• Voltage - Supply: 6.5 V ~ 29 V
• Operating Temperature: -40°C ~ 165°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Product: Stepper Motor Controllers / Drivers
• Operating Supply Voltage: 6.5 V to 29 V
• Supply Current: 800 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Applications: -
• Voltage - Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Where:
CMD[6:0]: 0x11, corresponding to dynamic assignment of four LIN identifiers
Broad:If <Broad> = ‘0’ all the circuits connected to the LIN bus will share the same dynamically assigned identifiers.
Dyn_ID_x [5:0]: Dynamically assigned LIN identifier to the application command which ROM pointer is <ROMp_x [3:0]>
One frame allows only assigning of four identifiers. Therefore, additional frames could be needed in order to assign more
identifiers (maximum three for the AMIS−30621).
Table 27. DYNAMIC IDENTIFIERS WRITING FRAME
Byte
0
1
2
3
4
5
6
7
8
9
Checksum
AppCMD
Identifier
Content
Address
CMD
Data
Data
Data
Data
Data
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
Dynamic ID
Broad
Bit 7
Figure 24. Principle of Dynamic Command Assignment
1
ROMp_4[1:0]
DynID_2[1:0]
Command assignment via Dynamic ID during operation
Bit 6
AD6
ROMp_3[3:0]
DynID_1[3:0]
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ROM pointer
Bit 5
AD5
0010
0011
0100
0101
0110
0000
0001
1000
0111
DynID_4[5:0]
39
Checksum over data
Bit 4
AD4
ROMp_2[3:0]
Structure
0x3C
0x80
GeneralPurpose 2 bytes
GeneralPurpose 4 bytes
Application Command
SetPositionShort (1 m)
SetPositionShort (2 m)
SetPositionShort (4 m)
Bit 3
0x11
AD3
Preparation Frame
DynID_3[5:0]
GetActualPos
SetPosition
GetStatus
Bit 2
AD2
ROMp_1[3:0]
DynID_2[5:2]
Bit 1
AD1
ROMp_4[3:2]
DynID_1[5:4]
Bit 0
AD0