LTC3566EUF#TRPBF Linear Technology, LTC3566EUF#TRPBF Datasheet - Page 10

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LTC3566EUF#TRPBF

Manufacturer Part Number
LTC3566EUF#TRPBF
Description
IC USB POWER MANAGER 24-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3566EUF#TRPBF

Applications
Handheld/Mobile Devices
Voltage - Supply
4.35 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

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LTC3566/LTC3566-2
SWCD1 (Pin 11): Switch Node for the (Buck-Boost)
Switching Regulator. Connected to internal power switches
C and D. External inductor connects between this node
and SWAB1.
ILIM0 (Pin 13): Logic Input. Control pin for ILIM0 bit of
the current limit of the PowerPath switching regulator.
See Table 2. Active high. Has a 1.6μA internal pull-down
current source.
ILIM1 (Pin 14): Logic Input. Control pin for ILIM1 bit of
the current limit of the PowerPath switching regulator.
See Table 2. Active high. Has a 1.6μA internal pull-down
current source.
PROG (Pin 15): Charge Current Program and Charge
Current Monitor Pin. Connecting a resistor from PROG
to ground programs the charge current. If suffi cient in-
put power is available in constant-current mode, this pin
servos to 1V. The voltage on this pin always represents
the actual charge current.
CHRG (Pin 16): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger. Four
possible states are represented by CHRG: charging, not
charging, unresponsive battery and battery temperature
out of range. CHRG is modulated at 35kHz and switches
between a low and high duty cycle for easy recognition
by either humans or microprocessors. See Table 1. CHRG
requires a pull-up resistor and/or LED to provide indica-
tion.
GND (Pin 17): GND pin for USB Power Manager.
GATE (Pin 18): Analog Output. This pin controls the gate
of an optional external P-channel MOSFET transistor used
to supplement the ideal diode between V
external ideal diode operates in parallel with the internal
ideal diode. The source of the P-channel MOSFET should
be connected to V
to BAT. If the external ideal diode FET is not used, GATE
should be left fl oating.
PIN FUNCTIONS
10
OUT
and the drain should be connected
OUT
and BAT. The
BAT (Pin 19): Single-Cell Li-Ion Battery Pin. Depending on
available V
deliver power to V
from V
V
Controller and Input Voltage of the Battery Charger. The
majority of the portable product should be powered from
V
between the external load on V
charger. Priority is given to the external load and any extra
power is used to charge the battery. An ideal diode from
BAT to V
exceeds the allotted power from V
source is removed. V
impedance ceramic capacitor.
V
power to V
from a DC source such as a USB port or wall adapter.
SW (Pin 22): Power Transmission Pin for the USB Pow-
erPath. The SW pin delivers power from V
via the step-down switching regulator. A 3.3μH inductor
should be connected from SW to V
CHRGEN (Pin 23): Logic Input. This logic input pin inde-
pendently enables the battery charger. Active low. Has a
1.6μA internal pull-down current source.
EN1 (Pin 24): Logic Input. This logic input pin independently
enables the buck-boost switching regulator. Active high.
Has a 1.6μA internal pull-down current source.
Exposed Pad (Pin 25): Ground. Buck-boost logic and USB
Power Manager ground connections. The Exposed Pad
should be connected to a continuous ground plane on the
printed circuit board directly under the LTC3566.
OUT
OUT
BUS
. The LTC3566 family will partition the available power
(Pin 20): Output Voltage of the Switching PowerPath
(Pin 21): Primary Input Power Pin. This pin delivers
OUT
OUT
OUT
BUS
via the battery charger.
ensures that V
via the SW pin by drawing controlled current
power, a Li-Ion battery on BAT will either
OUT
through the ideal diode or be charged
OUT
should be bypassed with a low
OUT
OUT
is powered even if the load
BUS
and the internal battery
OUT
or if the V
.
BUS
BUS
to V
power
3566fb
OUT

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