MAX16070ETL+ Maxim Integrated Products, MAX16070ETL+ Datasheet - Page 35

• Manufacturer Part Number: MAX16070ETL+
• Description: IC SYSTEM MANAGER 12CH 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX16070ETL+

• Applications: Power Supply Monitor
• Voltage - Supply: 2.8 V ~ 14 V
• Current - Supply: 4.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-VQFN Exposed Pad, 40-HVQFN, 40-SQFN, 40-DHVQFN
• Product: Current Monitors
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Accuracy: 2.5 %
• Sense Voltage (max): 14 V
• Supply Current (max): 14 mA
• Supply Voltage (max): 14 V
• Supply Voltage (min): 2.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The receive byte protocol allows the master device to
read the register content of the MAX16070/MAX16071
(see Figure 11). The flash or register address must be
preset with a send byte or write word protocol first. Once
the read is complete, the internal pointer increases by
one. Repeating the receive byte protocol reads the con-
tents of the next address. The receive byte procedure
follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a read
3) The addressed slave asserts an ACK on SDA.
4) The slave sends 8 data bits.
5 The master asserts a NACK on SDA.
6) The master generates a STOP condition.
The write byte protocol (see Figure 11) allows the master
device to write a single byte in the default page, extend-
ed page, or flash page, depending on which page is cur-
rently selected. The write byte procedure is the following:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit memory address.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The master sends a STOP condition.
To write a single byte, only the 8-bit memory address
and a single 8-bit data byte are sent. The data byte is
written to the addressed location if the memory address
is valid. The slave asserts a NACK at step 5 if the mem-
ory address is not valid.
When PEC is enabled, the Write Byte protocol becomes:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write
3) The addressed slave asserts an ACK on the data line.
4) The master sends an 8-bit memory address.
5) The active slave asserts an ACK on the data line.
6) The master sends an 8-bit data byte.
12-Channel/8-Channel, Flash-Configurable System
bit (high).
bit (low).
bit (low).
Managers with Nonvolatile Fault Registers
______________________________________________________________________________________
Receive Byte
Write Byte
7) The slave asserts an ACK on the data line.
8) The master sends an 8-bit PEC byte.
9) The slave asserts an ACK on the data line (if PEC is
10) The master generates a STOP condition.
The read byte protocol (see Figure 11) allows the master
device to read a single byte located in the default page,
extended page, or flash page depending on which page
is currently selected. The read byte procedure is the
following:
1)
2)
3)
4)
5)
6)
7)
8)
9)
10) The master asserts a NACK on SDA.
11) The master sends a STOP condition.
If the memory address is not valid, it is NACKed by the
slave at step 5 and the address pointer is not modified.
When PEC is enabled, the Read Byte protocol becomes:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write
3) The addressed slave asserts an ACK on the data line.
4) The master sends 8-bit memory address.
5) The active slave asserts an ACK on the data line.
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave ID plus a read bit (high).
8) The addressed slave asserts an ACK on the data line.
9) The slave sends 8 data bits.
10) The master asserts an ACK on the data line.
11) The slave sends an 8-bit PEC byte.
12) The master asserts a NACK on the data line.
13) The master generates a STOP condition.
good, otherwise NACK).
bit (low).
The master sends a START condition.
The master sends the 7-bit slave address and a
write bit (low).
The addressed slave asserts an ACK on SDA.
The master sends an 8-bit memory address.
The addressed slave asserts an ACK on SDA.
The master sends a REPEATED START condition.
The master sends the 7-bit slave address and a
read bit (high).
The addressed slave asserts an ACK on SDA.
The slave sends an 8-bit data byte.
Read Byte
35