MCP98242T-BE/MCA2 Microchip Technology, MCP98242T-BE/MCA2 Datasheet - Page 26

• Manufacturer Part Number: MCP98242T-BE/MCA2
• Description: IC MEMORY MOD TEMP SENSOR 8-DFN
• Manufacturer: Microchip Technology

Specifications of MCP98242T-BE/MCA2

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MCP98242T-BE/MC; MCP98242T-BE/MC; MCP98242T-BE/MCA2TR; MCP98242T-BE/MCTR; MCP98242T-BE/MCTR

MCP98242
5.1.6
The upper byte of this register is used to specify the
device identification and the lower byte is used to
specify device revision. The device ID for the
MCP98242 is 0x21 (hex).
The revision begins with 0x00 (hex) for the first release,
with the number being incremented as revised versions
are released.
REGISTER 5-7:
FIGURE 5-7:
“Serial
DS21996D-page 26
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
SCLK
SDA
R-0
R-0
SCLK
SDA
Communication”).
DEVICE ID AND REVISION
REGISTER
S
Device ID: Bit 15 to bit 8 are used for device ID
Device Revision: Bit 7 to bit 0 are used for device revision
1
0
S
2
0
1
0
R-0
R-0
DEVICE ID AND DEVICE REVISION (READ-ONLY)  ADDRESS ‘0000 0111’b
Address Byte
Timing Diagram for
3
1
2
0
Address Byte
4
1
3
1
A
5
2
4
1
W = Writable bit
‘1’ = Bit is set
A
6
1
A
5
2
R-1
R-0
A
0
7
6
A
1
MCP98242
W
8
A
0
7
MCP98242
A
C
K
8
R
Reading Device ID and Device Revision Register
1
0
A
C
K
Device ID Pointer
2
R-0
R-0
0
1
0
Device Revision
3
0
2
0
Device ID
4
0
3
1
MSB Data
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
5
0
4
0
6
1
0
5
R-0
R-0
7
1
6
0
MCP98242
8
1
7
0
A
C
K
8
0
Master
A
C
K
R-0
R-0
1
0
Note:
2
0
3
0
LSB Data
 2010 Microchip Technology Inc.
x = Bit is unknown
4
0
It is not necessary to
select
Pointer if it was set
from the previous read/
write.
5
0
R-0
R-0
(See
6
0
7
0
Section 4.0
the
8
0
Master
N
A
K
Register
R-0
R-1
P
bit 8
bit 0