LM81BIMT-3/NOPB National Semiconductor, LM81BIMT-3/NOPB Datasheet - Page 22

• Manufacturer Part Number: LM81BIMT-3/NOPB
• Description: IC MONITOR SYS HARDWARE 24TSSOP
• Manufacturer: National Semiconductor

Specifications of LM81BIMT-3/NOPB

• Function: Hardware Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Speed Control, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 2.8 V ~ 3.8 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Monitored Voltage: 2.5 V , 3.3 V , 5 V , 12 V
• Manual Reset: Not Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No
• Supply Voltage (max): 3.8 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 400 uA (Typ)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM81BIMT-3; *LM81BIMT-3/NOPB; LM81BIMT-3

www.national.com
Functional Description
9.0 THE LM81 INTERRUPT STRUCTURE
Figure 17 depicts the Interrupt Structure of the LM81. The
LM81 can generate Interrupts as a result of each of its
internal WATCHDOG registers on the analog, temperature,
and fan inputs.
External Interrupts can come from the following source.
While the label suggests a specific type or source of Inter-
rupt, this label is not a restriction of its usage, and it could
come from any desired source:
• Chassis Intrusion: This is an active high interrupt from
any type of device that detects and captures chassis
intrusion violations. This could be accomplished me-
chanically, optically, or electrically, and circuitry external
(Continued)
FIGURE 17. Interrupt Structure
22
All interrupts are indicated in the two Interrupt Status Regis-
ters. The INT output has two mask registers, and individual
to the LM81 is expected to latch the event. The design of
the LM81 allows this input to go high even with no power
applied to the LM81, and no clamping or other interfer-
ence with the line will occur. This line can also be pulled
low for at least 20 ms by the LM81 to reset a typical
Chassis Intrusion circuit. Accomplish this reset by setting
Bit 7 of CI Clear Register (45h) high. The bit in the
Register is self-clearing.
DS100072-22