LM96163CISDX/NOPB National Semiconductor, LM96163CISDX/NOPB Datasheet - Page 14

• Manufacturer Part Number: LM96163CISDX/NOPB
• Description: IC TEMP SENSOR DGTL REMOTE 10LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®, TruTherm®r

Specifications of LM96163CISDX/NOPB

• Function: Fan Control, Temp Monitor
• Topology: ADC (Sigma Delta), Comparator, Register Bank, Tach
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 85°C, External Sensor
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM96163CISDX

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FIGURE 5. Digital Filter Response in a typical Intel processor on a 65 nm or 90 nm process. The filter curves were purposely
Figure 5
purposely offset for clarity. Inserting the filter does not induce an offset as shown.
1.10 FAULT QUEUE
The LM96163 incorporates a Fault Queue to suppress erro-
neous ALERT triggering . The Fault Queue prevents false
triggering by requiring three consecutive out-of-limit HIGH or
LOW temperature readings. See
defaults to OFF upon power-up and may be activated by set-
ting the RDTS Fault Queue bit in the Configuration Register
to a 1.
FIGURE 6. Fault Queue Temperature Response Diagram
shows the filter in use in a typical Intel processor on a 65/90 nm process system. Note that the two curves have been
Figure
6. The Fault Queue
30041013
offset for clarity.
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1.11 ONE-SHOT REGISTER
The One-Shot Register is used to initiate a single conversion
and comparison cycle when the device is in standby mode,
after which the data returns to standby. This is not a data reg-
ister. A write operation causes the one-shot conversion. The
data written to this address is irrelevant and is not stored. A
zero will always be read from this register.
1.12 SERIAL INTERFACE RESET
In the event that the SMBus Master is reset while the
LM96163 is transmitting on the SMBDAT line, the LM96163
must be returned to a known state in the communication pro-
tocol. This may be done in one of two ways:
1.
2.
When SMBDAT is Low, the LM96163 SMBus state
machine resets to the SMBus idle state if either SMBDAT
or SMBCLK are held Low for more than 35 ms
(t
SMBCLK or SMBDAT lines are held Low for 25 ms – 35
ms. Therefore, to insure a timeout of devices on the bus,
either the SMBCLK or the SMBDAT line must be held
Low for at least 35 ms.
With both SMBDAT and SMBCLK High, the master can
initiate an SMBus start condition with a High to Low
transition on the SMBDAT line. The LM96163 will
respond properly to an SMBus start condition at any point
during the communication. After the start the LM96163
will expect an SMBus Address address byte.
TIMEOUT
30041012
). Devices are to timeout when either the