ADR293GRU-REEL7 Analog Devices Inc, ADR293GRU-REEL7 Datasheet - Page 10
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
ADR293GRU-REEL7
Manufacturer Part Number
ADR293GRU-REEL7
Description
IC VREF PREC 5V 5MA OUT 8-TSSOP
Manufacturer
Analog Devices Inc
Series
XFET®r
Datasheet
1.ADR293ERZ.pdf
(16 pages)
Specifications of ADR293GRU-REEL7
Rohs Status
RoHS non-compliant
Reference Type
Series
Voltage - Output
5V
Tolerance
±0.2%
Temperature Coefficient
30ppm/°C
Voltage - Input
6 ~ 15 V
Number Of Channels
1
Current - Quiescent
15µA
Current - Output
5mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Current - Cathode
-
ADR293
THEORY OF OPERATION
The ADR293 uses a new reference generation technique known
as XFET, which yields a reference with low noise, low supply
current, and very low thermal hysteresis.
The core of the XFET reference consists of two junction field
effect transistors, one of which has an extra channel implant to
raise its pinch-off voltage. By running the two JFETs at the same
drain current, the difference in pinch-off voltage can be amplified
and used to form a highly stable voltage reference. The intrinsic
reference voltage is around 0.5 V with a negative temperature
coefficient of about –120 ppm/K. This slope is essentially locked
to the dielectric constant of silicon and can be closely compen-
sated by adding a correction term generated in the same fashion
as the proportional-to-temperature (PTAT) term used to
compensate band gap references. The big advantage over a band
gap reference is that the intrinsic temperature coefficient is
some 30 times lower (therefore, less correction is needed) and
this results in much lower noise, because most of the noise of a
band gap reference comes from the temperature compensation
circuitry.
The simplified schematic in Figure 21 shows the basic topology
of the ADR293. The temperature correction term is provided by
a current source with value designed to be proportional to
absolute temperature. The general equation is
where:
ΔV
I
The process used for the XFET reference also features vertical
NPN and PNP transistors, the latter of which are used as output
devices to provide a very low dropout voltage.
PTAT
P
is the difference in pinch-off voltage between the two FETs.
is the positive temperature coefficient correction current.
V
OUT
V
=
OUT
1
Δ
EXTRA CHANNEL IMPLANT
I
V
1
=
P
R1 + R2 + R3
⎛
⎜
⎝
I
Figure 21. Simplified Schematic
1
R1
R1
+
1
R2
R1
× ΔV
ΔV
+
P
P
R3
+ I
V
PTAT
⎞
⎟
⎠
IN
+
× R3
R1
R2
R3
(
I
PTAT
)
GND
( )
I
PTAT
R3
V
OUT
Rev. C | Page 10 of 16
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR293 is guaranteed to deliver load currents to 5 mA
with an input voltage that ranges from 5.5 V to 15 V. When
this device is used in applications with large input voltages,
care should be exercised to avoid exceeding the published
specifications for maximum power dissipation or junction
temperature that could result in premature device failure.
The following formula should be used to calculate a device’s
maximum junction temperature or dissipation:
where:
T
temperature, respectively.
P
θ
BASIC VOLTAGE REFERENCE CONNECTIONS
References, in general, require a bypass capacitor connected
from the V
illustrates the basic configuration for the ADR293. Note that the
decoupling capacitors are not required for circuit stability.
NOISE PERFORMANCE
The noise generated by the ADR293 is typically less than
15 μV p-p over the 0.1 Hz to 10 Hz band. The noise measure-
ment is made with a band-pass filter made of a 2-pole high-pass
filter with a corner frequency at 0.1 Hz and a 2-pole low-pass
filter with a corner frequency at 10 Hz.
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two
components normally associated with this are the time for the
active circuits to settle and the time for the thermal gradients on
the chip to stabilize. Figure 15 shows the typical turn-on time
for the ADR293.
JA
D
J
and T
is the device power dissipation.
is the device package thermal resistance.
P
D
+
=
A
are the junction temperature and ambient
10µF
T
OUT
J
Figure 22. Basic Voltage Reference Configuration
θ
−
JA
T
pin to the GND pin. The circuit in Figure 22
A
0.1µF
NC
NC
NC = NO CONNECT
1
2
3
4
ADR293
8
7
6
5
NC
NC
V
NC
OUT
0.1µF