LT1573CS8-2.5 Linear Technology, LT1573CS8-2.5 Datasheet - Page 11
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LT1573CS8-2.5
Manufacturer Part Number
LT1573CS8-2.5
Description
IC LDO REGULATOR DVR 2.5V 8-SOIC
Manufacturer
Linear Technology
Type
Positive Fixedr
Datasheet
1.LT1573CS8-2.5.pdf
(16 pages)
Specifications of LT1573CS8-2.5
Number Of Outputs
1
Voltage - Output
2.5V
Current - Supply
1.7mA
Voltage - Input
2.8 ~ 10 V
Operating Temperature
0°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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APPLICATIO S I FOR ATIO
Thermal Limiting
The thermal shutdown temperature of the LT1573 is
approximately 150°C. The thermal limit of the LT1573 can
be used to protect both the LT1573 and the external PNP
pass transistor. This is accomplished by thermally cou-
pling the LT1573 to the PNP power transistor by locating
the LT1573 as close to the PNP transistor as possible. In
this case, the power dissipation of the power transistor
must be considered in the LT1573 maximum junction
temperature calculation.
We can find out the maximum junction temperature of
the LT1573 during normal load operation after we
calculate the maximum power dissipation of the LT1573
from Eq (2). From the previous design example, the
maximum power dissipation of the LT1573 is 0.2W.
From Table 3, we know the thermal resistance from
junction-to-ambient is around 85°C/W. The tempera-
ture difference between junction and ambient is:
If the maximum ambient temperature is specified at
50°C, the maximum junction temperature will be:
The maximum junction temperature must not exceed
the specified 125°C for safe continuous regulator op-
eration.
capabilities of the PC board and its copper traces. Table
3 lists some typical values for the thermal resistance of
the LT1573. Measured values of thermal resistance for
a specific board size with different copper areas are
listed. All measurements were taken in still air on 3/32
FR-4 board with 2oz copper. It is possible to achieve
significantly lower values with thinner multilayer boards.
Table 3. LT1573 Thermal Resistance
TOPSIDE*
*Device is mounted on topside.
2500mm
1000mm
225mm
(0.25W)(85°C/W) = 21.25°C
T
COPPER AREA
JMAX
2
2
2
= 50°C + 21.25°C = 71.25°C
BACKSIDE
2500mm
2500mm
2500mm
U
2
2
2
BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm
2500mm
2500mm
U
2
2
2
W
THERMAL RESISTANCE
80°C/W
80°C/W
85°C/W
U
"
Compensation
In order to improve the transient response to regulator
output load variation, a capacitor in series with a resistor
can be inserted between the V
microprocessor power supply regulator system based on
the LT1573 and the PNP transistor D45H11 with 24 1µF
surface mount ceramic capacitors in parallel with one
220µF surface mount tantalum capacitor at the output as
shown in Figure 1, a 100pF capacitor in series with a 1k
resistor is recommended. In theory, the output capacitor
forms the dominant pole of the regulator system. An
internal compensation capacitor forms another pole. The
external compensation capacitor and resistor form a zero
which adds phase margin to the regulator system to
prevent high frequency oscillation. The LT1573 has an
internal pole at approximately 5kHz. An external compen-
sation zero between 10kHz and 100kHz is usually required
to stabilize the regulator. The zero frequency is primarily
determined by the compensation capacitor and can be
roughly calculated by the following equation:
A compensation resistor between 1k and 10k is sug-
gested. A compensation resistor of 5k works for most
cases. In some cases, a greater compensation resistor is
needed to stop oscillation above 1MHz. In some cases, the
output capacitor may have enough equivalent series resis-
tance (ESR) to generate the required zero and the external
compensation zero may not be needed.
Output Capacitor
The LT1573 is designed to be used with an external PNP
transistor with a high gain-bandwidth product f
a regulator with a very fast transient response, which can
minimize the size of the output capacitor. For a regulator
made of an LT1573 and a D45H11, only one 10µF surface
mount ceramic capacitor at the output is enough for the
regulator to handle the output load varying up to 5A in a
few hundred nanoseconds interval and to remain stable
with a 30pF capacitor in series with a 7.5k resistor between
the V
f
ZERO
OUT
=
and COMP pins. If tighter voltage regulation is
(
40
kHz
) ( ) ( )
C
COMP
30
pF
pF
OUT
,
10
and COMP pins. For the
≤
C
COMP
LT1573
≤
sn1573 1573fas
T
100
to make
11